50s116t Ceramate Technical Co., Ltd., 50s116t Datasheet - Page 24

no-image

50s116t

Manufacturer Part Number
50s116t
Description
Sdram 512k X 2 Banks X 16 Bits Sdram
Manufacturer
Ceramate Technical Co., Ltd.
Datasheet
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:886-3-3214525
Fax:886-3-3521052
Operating Timing Example, continued
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto Precharge)
A0-A9
Bank #0
Bank #1
(CLK = 100 MHz)
DQM
CLK
RAS
CAS
CKE
A10
WE
DQ
CS
BA
Active
RAa
RAa
0
1
t
RCD
2
Read
CAx
3
t
RRD
4
t
CAC
5
t
ax0
RAS
6
ax1
7
* AP is the internal precharge start timing
Active
RBb
RBb
ax2
8
t
RC
ax3
9
Page 24 of 42
t
RCD
ax4
10
Read
AP*
CBy
ax5
11
t
RRD
ax6
12
ax7
13
t
RP
t
by0
RAS
14
t
CAC
Active
RAc
RAc
by1
15
t
RC
16
t
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
RCD
17
Read
by4
CAz
18
by5
AP*
50S116T
19
t
t
RAS
CAC
by6
Rev 1.0 Aug.20,2002
20
21
CZ0
SDRAM
t
RP
22
23

Related parts for 50s116t