sc28l198 NXP Semiconductors, sc28l198 Datasheet - Page 32
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sc28l198
Manufacturer Part Number
sc28l198
Description
Octal Uart For 3.3v And 5v Supply Voltage
Manufacturer
NXP Semiconductors
Datasheet
1.SC28L198.pdf
(57 pages)
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Table 44. Summary Register Map, Data
REGISTER MAP DETAIL
Table 45. Register Map, Control
NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip. These are
denoted by a
2006 Aug 10
0000 0000 (x00)
0000 0001 (x01)
0000 0010 (x02)
0000 0011 (x03)
0000 0100 (x04)
0000 0101 (x05)
0000 0110 (x06)
0000 0111 (x07)
0000 1000 (x08)
0000 1001 (x09)
0000 1010 (x0A)
0000 1011 (x0B)
0000 1100 (x0C)
0000 1101 (x0D)
0000 1110 (x0E)
0000 1111 (x0F)
Octal UART for 3.3 V and 5 V supply voltage
Address (hex) ccc = Channel
A(7:0)
A(7:0)
1000 0100 (x84)
1000 1011 (x8B)
1000 1100 (x8C)
1000 1100 (x8C)
1001 1101 (x9D)
1001 0100 (x94)
1001 1011 (x9B)
1001 1100 (x9C)
1001 1100 (x9C)
1001 1101 (x9D)
1001 1101 (x9D)
1ccc 0000 (x80)
1ccc 0001 (x81)
1ccc 0001 (x81)
1ccc 0010 (x82)
1ccc 0010 (x82)
1ccc 0100 (x84)
1ccc 0101 (x85)
1000 0111 (x87)
1000 1110 (x8E)
1000 1110 (x8E)
1000 1111 (x8F)
1001 0111 (x97)
1001 1111 (x9F)
1ccc 0011 (x83)
1ccc 0011 (x83)
1ccc 0110 (x86)
symbol
Mode Register 0 MR0a
Mode Register 1 MR1a
I/O Port Configuration Reg a I/OPCRa
BCRBRKa
BCRCOSa
Reserved
BCRXa
BCRAa
Xon Character Reg a (XonCRa)
Xoff Character Reg a (XoffCRa)
Address Recognition Character a (ARCRa)
Reserved
Receiver Clock Select Register a (RxCSRa)
Xmit Clock Select Register a TxCSRa)
Test Register
Global Chip Configuration Reg(GCCR)
Mode Register 2
Status Register
Command Register
Interrupt Status Register
Interrupt Mask Register
Transmitter FIFO Register
Receiver FIFO Reg
Input Port Reg
I/O Port Interrupt and Output
Xon/Xoff Interrupt Status Reg
BRG Timer Reg Upper a
GP Out Select Reg
GP Out Clk Reg
Update Current Interrupt Reg
Current Interrupt Reg
BRG Timer Reg Upper b
Global Receive FIFO Reg
Global Transmit FIFO Reg
Global Chip Configuration Reg
BRG Timer Reg Lower a
GP Output Reg
GP Out Data Reg
BRG Timer Control Reg
Global Interrupt Channel Reg
BRG Timer Reg Lower b
Global Interrupt Byte Count
Global Interrupt Type Register
Read
Register Name
32
UART A
Mode Register 0 MR0a
Mode Register 1 MR1a
I/O Port Configuration Reg a I/OPCRa
BCRBRKa
BCRCOSa
Reserved
BCRXa
BCRAa
Xon Character Reg a (XonCRa)
Xoff Character Reg a (XoffCRa)
Address Recognition Character a (ARCRa)
Reserved
Receiver Clock Select Register a (RxCSRa)
Test Register
Xmit Clock Select Register a TxCSRa)
Global Chip Configuration Reg GCCR)
BRGTRUa
BRGTRUb
BGRTRLa
BRGTRLb
Acronym
GRxFIFO
BRGTCR
GTxFIFO
I/OPIOR
GPOSR
TxFIFO
RxFIFO
GIBCR
GPOC
GCCR
GPOR
GPOD
Write
UCIR
GICR
XISR
GITR
MR2
IMR
ISR
IPR
CIR
SR
CR
SC28L198
Product data sheet
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R