st10f273m STMicroelectronics, st10f273m Datasheet - Page 94

• Manufacturer Part Number: st10f273m
• Description: 16-bit Mcu With 512 Kbyte Flash Memory And 36 Kbyte Ram
• Manufacturer: STMicroelectronics

System reset
20.4
94/182
Figure 25. Synchronous long hardware RESET (EA = 0)
1. If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5V for
2. Minimum RSTIN low pulse duration shall also be longer than 500ns to guarantee the pulse is not masked
3. 3 to 8 TCL depending on clock source selection.
Software reset
A software reset sequence can be triggered at any time by the protected SRST (software
reset) instruction. This instruction can be deliberately executed within a program, for
example, to leave bootstrap loader mode, or on a hardware trap that reveals system failure.
On execution of the SRST instruction, the internal reset sequence is started. The
microcontroller behavior is the same as for a synchronous short reset, except that only bits
P0.12...P0.8 are latched at the end of the reset sequence, while previously latched, bits
P0.7...P0.2 are cleared (that is written at ‘1’).
A Software reset is always taken as synchronous: there is no influence on Software Reset
behavior with RPD status. In case Bidirectional Reset is selected, a Software Reset event
pulls RSTIN pin low: this occurs only if RPD is high; if RPD is low, RSTIN pin is not pulled
low even though Bidirectional Reset is selected.
5V operation), the asynchronous reset is then immediately entered.
by the internal filter (refer to
RSTIN
RSTF
(After Filter)
P0[15:13]
P0[12:2]
P0[1:0]
ALE
RST
RSTOUT
RPD
≤ 500 ns
≥ 50 ns
4 TCL
200µA Discharge
2)
12 TCL
Section
not transparent
≤ 500 ns
≥ 50 ns
21.1).
1024+8 TCL
1024+8 TCL
not transparent
transparent
1)
V
RPD
At this time RSTF is sampled LOW
so it is LONG reset
transparent
≤ 500 ns
≥ 50 ns
> 2.5V Asynchronous reset not entered
3..4 TCL
3..8 TCL
3)
not t.
not t.
not t.
8 TCL
ST10F273M