cs4244-enzr Cirrus Logic, Inc., cs4244-enzr Datasheet - Page 51
cs4244-enzr
Manufacturer Part Number
cs4244-enzr
Description
4 In/4 Out Audio Codec With Pcm And Tdm Interfaces
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS4244-ENZR.pdf
(66 pages)
- Current page: 51 of 66
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DS900PP2
6.5.3
6.5.4
6.6
6.6.1
6.6.2
ADC34 CM
7
Serial Port Data Select (Address 09h)
Serial Data Output Sidechain
Setting this bit enables the SDOUT1 side chain feature. In this mode, the samples from multiple devices
can be coded into one TDM stream. See
Master / Slave
Setting this bit places the CS4244 in master mode, clearing it places it in slave.
Note:
into Master Mode.
ADCx Common Mode
Enables the ADCx input pin bias to VQ. ADC1 and ADC2 are controlled together; ADC3 and ADC4 are
controlled together. See
Note: If these bits are set to ‘1’, the ADC HPF must be enabled to achieve full specified performance.
DAC1-4 Data Source
Sets which portion of data is to be routed to the DAC1-4 data paths.
SDO CHAIN
0
1
MASTER / SLAVE CS4244 is in:
0
1
ADCx CM
0
1
DAC1-4 SOURCE Data is routed into the DAC1-4 path from:
000
001
010
011
100
101
110
111
ADC12 CM
I²S and Left Justified are the only serial port formats that are available if the CS4244 is placed
6
Sidechain is:
Disabled
Enabled
Slave Mode
Master Mode
AINx+ and AINx- bias to VQ is:
Disabled
Enabled
Slots 1-4 of the TDM stream on SDIN1
Slots 5-8 of the TDM stream on SDIN1
Slots 9-12 of the TDM stream on SDIN1
Slots 13-16 of the TDM stream on SDIN1
Slots 1-4 of the TDM stream on SDIN2
Slots 5-8 of the TDM stream on SDIN2
Slots 9-12 of the TDM stream on SDIN2
Slots 13-16 of the TDM stream on SDIN2
Section 4.6.2.1 Analog Inputs
5
DAC1-4 SOURCE[2:0]
4
Section 4.6.2 ADC Path
3
for more details.
for more details.
2
Reserved[2:0]
1
CS4244
0
51
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