cs44600 Cirrus Logic, Inc., cs44600 Datasheet - Page 27

• Manufacturer Part Number: cs44600
• Description: 6-channel Digital Amplifier Controller
• Manufacturer: Cirrus Logic, Inc.

DS633F1
DAI_SDINx
DAI_LRCK
DAI_SCLK
DAI_SDINx
DAI_SCLK
DAI_LRCK
4.4.1.1
For I²S, data is received most significant bit first, one DAI_SCLK delay after the transition of DAI_LRCK,
and is valid on the rising edge of DAI_SCLK. For the I²S format, the left channel data is presented when
DAI_LRCK is low; the right channel data is presented when DAI_LRCK is high.
4.4.1.2
For left-justified format, data is received most significant bit first on the first DAI_SCLK after a DAI_LRCK
transition and is valid on the rising edge of DAI_SCLK. For the left-justified format, the left channel data
is presented when DAI_LRCK is high and the right channel data is presented when DAI_LRCK is low.
MSB
MSB
I²S Data Format
Left-Justified Data Format
-1 -2 -3 -4 -5
-1 -2 -3 -4 -5
Left-Justified Mode, Data Valid on Rising Edge of DAI_SCLK
Bits/Sample
16
18 to 24
I²S Mode, Data Valid on Rising Edge of DAI_SCLK
Bits/Sample
16
18 to 24
+5 +4
Left C hannel
+5 +4
Left Channel
Figure 18. Left-Justified Serial Audio Formats
+3 +2 +1
+3 +2 +1
Figure 17. I²S Serial Audio Formats
LSB
LSB
SCLK Rate(s)
32, 48, 64, 128, 256 Fs
48, 64, 128, 256 Fs
SCLK Rates
32, 48, 64, 128, 256 Fs
48, 64, 128, 256 Fs
MSB
MSB
-1 -2 -3 -4
-1 -2 -3 -4
+5 +4
Right Channel
+5 +4
R ig ht C ha nnel
+3 +2 +1
+3 +2 +1
LSB
LSB
CS44600
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