cs4610c-cq Cirrus Logic, Inc., cs4610c-cq Datasheet - Page 20
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cs4610c-cq
Manufacturer Part Number
cs4610c-cq
Description
Crystalclear Soundfusion Pci Audio Accelerator Logic
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS4610C-CQ.pdf
(29 pages)
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ence of an external EEPROM device and load the
Subsystem ID and Subsystem Vendor ID fields,
along with two bytes of general configuration in-
formation, into internal registers. At power-up, the
CS4610/11 will attempt to read from the external
device, and will check the data received from the
device for a valid signature header. If the header
data is invalid, the data transfer is aborted. After
power-up, the host can read or write from/to the
EEPROM device by accessing specific registers in
the CS4610/11. Cirrus Logic provides software to
program the EEPROM.
The two wire interface for the optional external EE-
PROM device is depicted in Figure 15. During data
transfers, the data line (EEDAT) can change state
only while the clock signal (EECLK) is low. A
20
Figure 15. External EEPROM Connection
EEPROM
CS4610/11
DSP
EECLK
EEDAT
Start
S 1 0 1 0 0 0 0 0 A 0 0 0 0 0 0 0 0 AS 1 0 1 0 0 0 0 1 A
Address
Part
4.7 k
Figure 16. External EEPROM Read Access Sequence
Write
SCL
SDA
EEPROM
Address
Serial
Bank
Acknowledge
CrystalClear™ SoundFusion™ PCI Audio Accelerator
Start
Address
Part
state change of the data line while the clock signal
is high indicates a start or stop condition to the EE-
PROM device.
The EEPROM device read access sequence is
shown in the Figure 16. The timing follows that of
a random read sequence. The CS4610/11 first per-
forms a “dummy” write operation, generating a
start condition followed by the slave device address
and the byte address of zero. The slave address is
made up of a device identifier (0xA) and a bank se-
lect (bits A2-A0). The CS4610/11 always begins
access at byte address zero and continues access a
byte at a time. The byte address automatically in-
crements by one until a stop condition is detected.
The CS4610/11 will read a total of seven bytes
from the EEPROM.
General Purpose I/O Pins
Many of the CS4610/11 signal pins are internally
multiplexed to serve different functions depending
on the environment in which the device is being
used. Several of the CS4610/11 signal pins may be
used as general purpose I/O pins when not required
for other specific functions in a given application.
Read
Data
Acknowledge
Data
A
Data
Acknowledge
No
1
P
CS4610/11
Stop
DS241PP5