cs8904 Cirrus Logic, Inc., cs8904 Datasheet - Page 9

no-image

cs8904

Manufacturer Part Number
cs8904
Description
Crystal Lan? Quad Ethernet Transceiver
Manufacturer
Cirrus Logic, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cs8904-CM5
Manufacturer:
XILINX
0
Part Number:
cs8904-CM5
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
cs8904-CM5EP
Manufacturer:
INTERSIL
Quantity:
13 888
DS191PP2
AUTONEG[0:3] - Auto-Negotiation Status. Output with 4 mA drive, Pins 100, 80, 50, and 30.
RxDATA[0:3] - Received Data. Output with 4 mA drive, Pins 95, 85, 45, and 35.
JABBER[0:3] - Jabber. Output with 4 mA drive, Pins 97, 83, 47, and 33.
RxCLK[0:3] - Recovered Receive Clock. Output with 4 mA drive, Pins 94, 86, 44, and 36.
2.2 10BASE-T Interface
TX+[0:3], TX-[0:3] - 10BASE-T Transmit Pair. Output, Pins 10, 69, 60, 19, 11, 70, 61, and 20.
RX+[0:3], RX-[0:3] - 10BASE-T Receive Pair. Input, Pins 6, 73, 56, 23, 7, 74, 57, and 24.
2.3 LED Pins
LINKLED[0:3] - Link Status LED. Open Drain Output with 10 mA drive, Pins 96, 84, 46, and 34.
2.4 General Pins
XTAL1, XTAL2 - Crystal. Input, Output, Pins 38 and 39.
RESET - Reset. Input with Internal Weak Pullup, Pin 66.
CS8904
Crystal LAN™ Quad Ethernet Transceiver
This output remains high when Auto-Negotiation has taken place successfully, and remains low
when Auto-Negotiation has failed or is disabled for this port. See Section 4.3.2 (Control and
Status Information) for more information.
The data received for this port is output on this pin. This data is NRZ encoded and is
synchronized using the receive clock, RxCLK. The CD pin is asserted when receive data is
present on the RxDATA pin.
This output pin will assert to indicate that a jabber condition has been detected for this port.
The recovered receive clock for the port is output on this pin.
Differential output pair that drives 10 Mb/s Manchester-encoded data to the 10BASE-T twisted-
pair segment.
Differential input pair that receives 10 Mb/s Manchester-encoded data from the 10BASE-T
twisted-pair segment.
This active-low output goes low and remains continuously low for a functioning 10BASE-T
link. Refer to Section 4.3.2 (Control and Status Information) for more information on using the
LINKLED pin.
A 20 MHz crystal should be connected across these pins. Alternatively, a 20 MHz signal may
be connected to XTAL1; XTAL2 is left open.
Setting this pin low for at least 500 ns will reset the CS8904.
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
9

Related parts for cs8904