ltc2258cuj-12 Linear Technology Corporation, ltc2258cuj-12 Datasheet
ltc2258cuj-12
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ltc2258cuj-12 Summary of contents
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... PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer al- lows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 1. ...
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LTC2258-12 LTC2257-12/LTC2256-12 ABSOLUTE MAXIMUM RATINGS Supply Voltages ( ....................... –0. – Analog Input Voltage ( PAR/SER, SENSE) (Note 3) ...........–0. CS, + – Digital ...
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... ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC2258CUJ-12#PBF LTC2258CUJ-12#TRPBF LTC2258IUJ-12#PBF LTC2258IUJ-12#TRPBF LTC2257CUJ-12#PBF LTC2257CUJ-12#TRPBF LTC2257IUJ-12#PBF LTC2257IUJ-12#TRPBF LTC2256CUJ-12#PBF LTC2256CUJ-12#TRPBF LTC2256IUJ-12#PBF LTC2256IUJ-12#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. ...
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LTC2258-12 LTC2257-12/LTC2256-12 ANALOG INPUT The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are 25°C. (Note 5) A SYMBOL PARAMETER + – V Analog Input Range (A – A ...
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DIGITAL INPUTS AND OUTPUTS temperature range, otherwise specifi cations are at T SYMBOL PARAMETER + – ENCODE INPUTS (ENC , ENC ) – Differential Encode Mode (ENC Not Tied to GND) V Differential Input Voltage ID V Common Mode Input ...
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LTC2258-12 LTC2257-12/LTC2256-12 POWER REQUIREMENTS range, otherwise specifi cations are SYMBOL PARAMETER CONDITIONS CMOS Output Modes: Full Data Rate and Double Data Rate V Analog Supply Voltage (Note 10 Output Supply Voltage (Note 10 ...
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TIMING CHARACTERISTICS range, otherwise specifi cations are at T SYMBOL PARAMETER Digital Data Outputs (LVDS Mode) t ENC to Data Delay D t ENC to CLKOUT Delay C t DATA to CLKOUT Skew SKEW Pipeline Latency SPI Port Timing (Note ...
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LTC2258-12 LTC2257-12/LTC2256-12 TIMING DIAGRAMS ANALOG INPUT – ENC + ENC D0_1 • • • D10_11 OF + CLKOUT – CLKOUT ANALOG INPUT – ENC + ENC + D0_1 – D0_1 • • • + D10_11 – D10_11 + OF – ...
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TIMING DIAGRAMS SCK SDI R/W SDO HIGH IMPEDANCE CS SCK SDI R/W SDO HIGH IMPEDANCE TYPICAL PERFORMANCE CHARACTERISTICS LTC2258-12: Integral Nonlinearity (INL) 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 ...
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LTC2258-12 LTC2257-12/LTC2256-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2258-12: 8k Point FFT 30MHz IN –1dBFS, 65Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 225812 G04 LTC2258-12: 8k Point 2-Tone ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2258-12 Sample VDD Rate, 5MHz Sine Wave Input, –1dB, 5pF on Each Data Output 45 40 3.5mA LVDS 1.75mA LVDS 1.8V CMOS 1.2V CMOS ...
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LTC2258-12 LTC2257-12/LTC2256-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2257-12: Shorted Input Histogram 18000 16000 14000 12000 10000 8000 6000 4000 2000 0 2049 2051 2053 OUTPUT CODE 225812 G28 LTC2257-12: SFDR vs Input Level 70MHz, 2V Range, 40Msps IN 110 100 ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2256-12: 8k Point FFT 5MHz IN –1dBFS, 25Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 225812 G43 LTC2256-12: 8k Point FFT 140MHz ...
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LTC2258-12 LTC2257-12/LTC2256-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2256-12 Sample Rate, VDD 5MHz Sine Wave Input, –1dB 25 LVDS OUTPUTS 20 CMOS OUTPUTS SAMPLE RATE (Msps) 226112 G53 PIN FUNCTIONS PINS THAT ARE THE SAME FOR ...
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PIN FUNCTIONS data rate LVDS output mode (with 3.5mA output current) is enabled. SCK can be driven with 1.8V to 3.3V logic. SDI (Pin 15): In serial programming mode, (PAR/SER = 0V), SDI is the serial interface data input. Data ...
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LTC2258-12 LTC2257-12/LTC2256-12 PIN FUNCTIONS DOUBLE DATA RATE LVDS OUTPUT MODE All Pins Below Have LVDS Output Levels. The Output Current Level is Programmable. There is an Optional Internal 100Ω Termination Resistor Between the Pins of Each LVDS Output Pair. – ...
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APPLICATIONS INFORMATION CONVERTER OPERATION The LTC2258-12/LTC2257-12/LTC2256-12 are low power 12-bit 65Msps/40Msps/25Msps A/D converters that are powered by a single 1.8V supply. The analog inputs should be driven differentially. The encode input can be driven differentially or single-ended for lower power ...
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LTC2258-12 LTC2257-12/LTC2256-12 APPLICATIONS INFORMATION balun transformer (Figures has better balance, resulting in lower A/D distortion. Amplifi er Circuits Figure 7 shows the analog input being driven by a high speed differential amplifi er. The output of the ...
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APPLICATIONS INFORMATION Reference The LTC2258-12/2257-12/2256-12 has an internal 1.25V voltage reference. For a 2V input range using the internal reference, connect SENSE For a 1V input range DD using the external reference, connect SENSE to ground. For ...
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LTC2258-12 LTC2257-12/LTC2256-12 APPLICATIONS INFORMATION Encode Input The signal quality of the encode inputs strongly affects the A/D noise performance. The encode inputs should be treated as analog signals—do not route them next to digital traces on the circuit board. There ...
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APPLICATIONS INFORMATION For applications where the sample rate needs to be changed quickly, the clock duty cycle stabilizer can be disabled. If the duty cycle stabilizer is disabled, care should be taken to make the sampling clock have a 50%(±5%) ...
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LTC2258-12 LTC2257-12/LTC2256-12 APPLICATIONS INFORMATION Overfl ow Bit The overfl ow output bit (OF) outputs a logic high when the analog input is either overranged or underranged. The overfl ow bit has the same pipeline latency as the data bits. Phase ...
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APPLICATIONS INFORMATION Digital Output Randomizer Interference from the A/D digital outputs is sometimes unavoidable. Digital interference may be from capacitive or inductive coupling or coupling through the ground plane. Even a tiny coupling factor can cause unwanted tones in the ...
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LTC2258-12 LTC2257-12/LTC2256-12 APPLICATIONS INFORMATION The digital output is decoded at the receiver by inverting the odd bits (D1, D3, D5, D7, D9, D11). The alternate bit polarity mode is independent of the digital output random- izer—either, both or neither function ...
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APPLICATIONS INFORMATION Serial Programming Mode To use the serial programming mode, PAR/SER should be tied to ground. The CS, SCK, SDI and SDO pins become a serial interface that program the A/D mode control registers. Data is written to a ...
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LTC2258-12 LTC2257-12/LTC2256-12 APPLICATIONS INFORMATION REGISTER A2: TIMING REGISTER (ADDRESS 02h Bits 7-4 Unused, Don’t Care Bits. Bit 3 CLKINV Output Clock Invert Bit 0 = Normal CLKOUT Polarity (As Shown in the Timing Diagrams ...
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APPLICATIONS INFORMATION REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h OUTTEST2 Bit 7-6 Unused, Don’t Care Bits. Bits 5-3 OUTTEST2:OUTTEST0 000 = Digital Output Test Patterns Off 001 = All Digital Outputs = 0 011 = All ...
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... ENCODE CLOCK 100Ω SPI BUS R16 – D11 D10 CLKOUT 27 – CLKOUT 26 LTC2258CUJ OGND SDI SDO DNC DNC DIGITAL OUTPUTS 0V DD C37 0.1μF DIGITAL ...
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TYPICAL APPLICATIONS Silkscreen Top Inner Layer 2 GND LTC2257-12/LTC2256-12 225812 TA03 225812 TA05 LTC2258-12 Top Side 225812 TA04 Inner Layer 3 225812 TA06 225812p 29 ...
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LTC2258-12 LTC2257-12/LTC2256-12 TYPICAL APPLICATIONS Inner Layer 4 30 225812 TA07 Bottom Side 225812 TA09 Inner Layer 5 Power 225812 TA08 225812p ...
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... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... Integrated RF and LO Transformer Fixed Gain 10V/V, 2.1nV√Hz Total Input Noise, 3mm × 3mm QFN-16 Package Dual Matched 4th Order LP Filters with Differential Drivers. Low Noise, Low Distortion Amplifi ers www.linear.com ● 225812p LT 1208 • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2008 ...