ltc2258cuj-12 Linear Technology Corporation, ltc2258cuj-12 Datasheet - Page 16

• Manufacturer Part Number: ltc2258cuj-12
• Description: 12-bit, 65/40/2 5msps Ultralow Power 1.8v Adcs
• Manufacturer: Linear Technology Corporation

LTC2258-12
LTC2257-12/LTC2256-12
PIN FUNCTIONS
DOUBLE DATA RATE LVDS OUTPUT MODE
All Pins Below Have LVDS Output Levels. The Output
Current Level is Programmable. There is an Optional
Internal 100Ω Termination Resistor Between the Pins
of Each LVDS Output Pair.
D0_1
23/24, 29/30, 31/32, 33/34): Double Data Rate Digital
Outputs. Two data bits are multiplexed onto each differential
output pair. The even data bits (D0, D2, D4, D6, D8, D10)
16
FUNCTIONAL BLOCK DIAGRAM
SENSE
0.1μF
1μF
V
–
A
A
V
REF
IN
IN
/D0_1
CM
+
–
INPUT
REFERENCE
S/H
+
SELECT
RANGE
1.25V
to D10_11
V
DD
/2
REF
BUF
FIRST PIPELINED
–
ADC STAGE
/D10_11
+
DIFF
AMP
(Pins 19/20, 21/22,
REF
SECOND PIPELINED
ADC STAGE
0.1μF
REFH
Figure 1. Functional Block Diagram
REFH
0.1μF
2.2μF
REFL
THIRD PIPELINED
REFL
ADC STAGE
0.1μF
INTERNAL CLOCK SIGNALS
CLOCK/DUTY
ENC
CONTROL
CYCLE
+
appear when CLKOUT
D5, D7, D9, D11) appear when CLKOUT
CLKOUT
The digital outputs normally transition at the same time
as the falling and rising edges of CLKOUT
CLKOUT
by programming the mode control registers.
OF
is high when an overfl ow or underfl ow has occurred.
ENC
–
/OF
–
FOURTH PIPELINED
ADC STAGE
+
+
–
PAR/SER
(Pins 35/36): Over/Under Flow Digital Output. OF
/CLKOUT
can also be delayed relative to the digital outputs
CS
REGISTERS
CONTROL
MODE
SCK
+
FIFTH PIPELINED
SDI
ADC STAGE
(Pins 27/28): Data Output Clock.
+
SDO
is low. The odd data bits (D1, D3,
AND CORRECTION
SHIFT REGISTER
DRIVERS
OUTPUT
OGND
+
is high.
+
225812 F01
. The phase of
•
•
•
OV
GND
OF
D11
D0
CLKOUT
CLKOUT
V
DD
DD
225812p
+
–
+