nsc800 National Semiconductor Corporation, nsc800 Datasheet - Page 45

• Manufacturer Part Number: nsc800
• Description: Nsc800tm High-performance Low-power Cmos Microprocessor
• Manufacturer: National Semiconductor Corporation

12 8 Bit Set Reset and Test
BIT
Bit b in memory location m
Z
Timing
Addressing Mode
Timing
Addressing Mode
12 9 Rotate and Shift
REGISTER
RLC
Rotate register r left circular
Timing
Addressing Mode
7
1
0
7 6
1 1 N
1 1
0 1
7
1
0
6
1
1
6
1
0
m
B m
0
0
5
5
0
5
0
1b
r
X
4
0
b
4
0
0
1
4 3 2 1 0
1 1 1 0 1
0 1 0 1 1
b
d
3
1
3
1
0
2
0
1
1 1 0
2
0
P V Undefined
P V Set if result parity is even
1
1
1
1
1
H Set
N Reset
H Reset
N Reset
S Undefined
C N A
S Set if result is negative
C Set according to bit 7 of r
Z Inverse of tested bit
Z Set if result is zero
r
1
0
1
0
0
1
M cycles
T states
Bit Register Indirect
M cycles
T states
Bit Indexed
M cycles
T states
Register
is tested via the Z flag
RLC r
(Note alternate for
A register below)
BIT b (IX
BIT b (IY
BIT b (HL)
12 (4 4 4)
20 (4 4 3 5 4)
8 (4 4)
2
3
5
a
a
d) (for N
d) (for N
(Continued)
TL C 5171– 57
X
X
e
e
0)
1)
45
Timing
Addressing Mode
(Note RLCA does not affect S Z or P V flags )
RL
Rotate register r left through carry
Timing
Addressing Mode
Timing
Addressing Mode
(Note RLA does not affect S Z or P V flags )
RRC
Rotate register r right circular
7
0
7
1
0
7
0
6
1
0
6
0
6
0
r
5
0
0
5
0
5
0
r
4
0
1
4
0
4
1
3
1
0
3
0
3
0
2
0
2
1
2
1
P V Set if result parity is even
P V Set if result parity is even
1
1
r
1
1
1
1
H Reset
N Reset
C Set according to bit 7 of r
H Reset
N Reset
C Set according to bit 0 of r
S Set if result is negative
Z Set if result is zero
S Set if result is negative
Z Set if result is zero
0
1
0
1
0
M cycles
T states
Implied
M cycles
T states
Register
1
M cycles
T states
Implied
RL r
(Note alternate for
A register below)
RLCA
RLA
4
8 (4 4)
4
1
2
1
TL C 5171 – 58
TL C 5171 – 59