mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 311
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mcf5282
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Chapter 17
Fast Ethernet Controller (FEC)
17.1
This chapter provides a feature-set overview, a functional block diagram, and transceiver connection
information for the 10 and 100 Mbps MII (media independent interface), as well as the 7-wire serial
interface. Additionally, detailed descriptions of operation and the programming model are included.
17.1.1
The Ethernet media access controller (MAC) supports 10 and 100 Mbps Ethernet/IEEE 802.3 networks.
An external transceiver interface and transceiver function are required to complete the interface to the
media. The FEC supports three different standard MAC-PHY (physical) interfaces for connection to an
external Ethernet transceiver. The FEC supports the 10/100 Mbps MII and the 10 Mbps-only 7-wire
interface.
17.1.2
Figure 17-1
hardware and microcode. The off-chip (Ethernet) interfaces are compliant with industry and IEEE 802.3
standards.
Freescale Semiconductor
Introduction
Overview
Block Diagram
shows the block diagram of the FEC. The FEC is implemented with a combination of
The MCF5214 and MCF5216 do NOT contain an FEC module.
The GPIO module must be configured to enable the peripheral function of
the appropriate pins (refer to
prior to configuring the FEC.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Chapter 26, “General Purpose I/O
NOTE
NOTE
Module”)
17-1
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