mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 343

• Manufacturer Part Number: mcf5282
• Manufacturer: Freescale Semiconductor, Inc

The 7-wire serial mode interface (RCR[MII_MODE] cleared) is generally referred to as AMD mode.
Table 17-36
17.5.7
The Ethernet transmitter is designed to work with almost no intervention from software. After
ECR[ETHER_EN] is set and data appears in the transmit FIFO, the Ethernet MAC can transmit onto the
network. The Ethernet controller transmits bytes least significant bit (lsb) first.
When the transmit FIFO fills to the watermark (defined by TFWR), MAC transmit logic asserts
FEC_TXEN and starts transmitting the preamble (PA) sequence, the start frame delimiter (SFD), and then
the frame information from the FIFO. However, the controller defers the transmission if the network is
busy (FEC_CRS is asserted). Before transmitting, the controller waits for carrier sense to become inactive,
then determines if carrier sense stays inactive for 60 bit times. If so, transmission begins after waiting an
additional 36 bit times (96 bit times after carrier sense originally became inactive). See
“Transmission Errors,”
Freescale Semiconductor
FEC Frame Transmission
shows the 7-wire mode connections to the external transceiver.
for more details.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Management Data Clock
Signal description
Receive Data Valid
Signal Description
Table 17-36. 7-Wire Mode Configuration
Receive Data Valid
Management Data
Transmit Enable
Transmit Clock
Receive Clock
Transmit Data
Receive Data
Receive Clock
Carrier Sense
Receive Data
Receive Error
Table 17-35. MII Mode (continued)
Input/Output
Collision
Collision
FEC_RXD[3:0]
FEC_RXCLK
FEC_RXER
FEC_RXDV
FEC_MDIO
FEC_MDC
EMAC pin
FEC_RXCLK
FEC_COL
FEC_CRS
FEC_TXCLK
FEC_RXD[0]
FEC_TXD[0]
FEC_RXDV
FEC_TXEN
EMAC Pin
FEC_COL
Fast Ethernet Controller (FEC)
Section 17.5.15.1,
17-33