mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 78

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mcf5282

Manufacturer Part Number
mcf5282
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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ColdFire Core
2.3.5.7
2-32
Opcode
BRA
BSR
JMP
RTE
RTS
JSR
Branch Instruction Execution Times
<EA>
<ea>
<ea>
The execution times for moving the contents of the Racc, Raccext[01,23],
MACSR, or Rmask into a destination location <ea>x shown in this table
represent the best-case scenario when the store instruction is executed and
there are no load or M{S}AC instructions in the EMAC execution pipeline.
In general, these store operations require only a single cycle for execution,
but if preceded immediately by a load, MAC, or MSAC instruction, the
depth of the EMAC pipeline is exposed and the execution time is four
cycles.
Opcode
Bcc
Rn
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 2-18. General Branch Instruction Execution Times
Table 2-19. Bcc Instruction Execution Times
3(0/0)
3(0/1)
(An)
Forward
Taken
3(0/0)
10(2/0)
(An)+
5(1/0)
Not Taken
Forward
NOTE
1(0/0)
-(An)
Effective Address
(d16,An)
(d16,PC)
2(0/1)
3(0/1)
3(0/0)
3(0/1)
Backward
Taken
2(0/0)
(d8,An,Xi*SF)
(d8,PC,Xi*SF)
4(0/0)
4(0/1)
Not Taken
Backward
3(0/0)
xxx.wl
Freescale Semiconductor
3(0/0)
3(0/1)
#xxx

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