mbm29dl324te90tr Meet Spansion Inc., mbm29dl324te90tr Datasheet - Page 38

• Manufacturer Part Number: mbm29dl324te90tr
• Description: 32 M 4 M ? 8/2 M ? 16 Bit Dual Operation Flash Memory
• Manufacturer: Meet Spansion Inc.

38
MBM29DL32XTE/BE
■ FUNCTIONAL DESCRIPTION
* : By writing erase suspend command on the bank address of sector being erased, the erase operation gets
• Simultaneous Operation
MBM29DL32XTE/BE have feature, which is capability of reading data from one bank of memory while a program
or erase operation is in progress in the other bank of memory (simultaneous operation) , in addition to the
conventional features (read, program, erase, erase-suspend read, and erase-suspend program) . The bank
selection can be selected by bank address (A
The MBM29DL322TE/BE have two banks which contain
The MBM29DL323TE/BE have two banks which contain
The MBM29DL324TE/BE have two banks which contain
The simultaneous operation can not execute multi-function mode in the same bank. “Simultaneous Operation”
in “■ FUNCTIONAL DESCRIPTION” shows combination to be possible for simultaneous operation. (Refer to
the “Bank-to-bank Read/Write Timing Diagram” in “■ TIMING DIAGRAM”.)
suspended so that it enables reading from or programming the remaining sectors.
• Read Mode
The MBM29DL32XTE/BE have two control functions which must be satisfied in order to obtain data at the
outputs. CE is the power control and should be used for a device selection. OE is the output control and should
be used to gate data to the output pins if a device is selected.
Address access time (t
access time (t
enable access time is the delay from the falling edge of OE to valid data at the output pins (Assuming the
addresses have been stable for at least t
after power-up, it is necessary to input hardware reset or to change CE pin from “H” or “L”
• Standby Mode
There are two ways to implement the standby mode on the MBM29DL32XTE/BE devices, one using both the
CE and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V
Under this condition the current consumed is less than 5 μA Max During Embedded Algorithm operation, V
Bank 1 (8 KB × eight sectors, 64 KB × seven sectors) and Bank 2 (64 KB × fifty-six sectors) .
Bank 1 (8 KB × eight sectors, 64 KB × fifteen sectors) and Bank 2 (64 KB × forty-eight sectors) .
Bank 1 (8 KB × eight sectors, 64 KB × thirty-one sectors) and Bank 2 (64 KB × thirty-two sectors) .
Case
1
2
3
4
5
6
7
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
Autoselect Mode
Program Mode
Bank 1 status
Erase Mode *
Read Mode
Read Mode
Read Mode
Read Mode
Retired Product DS05-20881-8E_July 20, 2007
Simultaneous Operation
ACC
80 / 90
-t
20
OE
to A
time) . When reading out a data without changing addresses
15
) with zero latency.
Autoselect Mode
Program Mode
Bank 2 status
Erase Mode *
Read Mode
Read Mode
Read Mode
Read Mode
CC
± 0.3 V.
CC