mbm29dl324te90tr Meet Spansion Inc., mbm29dl324te90tr Datasheet - Page 48

• Manufacturer Part Number: mbm29dl324te90tr
• Description: 32 M 4 M ? 8/2 M ? 16 Bit Dual Operation Flash Memory
• Manufacturer: Meet Spansion Inc.

48
MBM29DL32XTE/BE
*1 : Successive reads from the erasing or erase-suspend sector causes DQ
*2 : Reading from non-erase suspend sector address will indicate logic “1” at the DQ
In Progress
Exceeded
Time Limits
• Write Operation Status
Detailed in “Hardware Sequence Flags” in “■ COMMAND DEFINITIONS” are all the status flags that can
determine the status of the bank for the current mode operation. The read operation from the bank where is not
operate Embedded Algorithm returns a data of memory cell. These bits offer a method for determining whether
a Embedded Algorithm is completed properly. The information on DQ
an address from an erasing sector is consecutively read, then the DQ
toggle if an address from a non-erasing sector is consecutively read. This allows the user to determine which
sectors are erasing and which are not.
The status flag is not output from bank (non-busy bank) not executing Embedded Algorithm. For example, there
is bank (busy bank) which is now executing Embedded Algorithm. When the read sequence is [1] < busy
bank > , [2] < non-busy bank > , [3] < busy bank > , the DQ
the data of memory cell is outputted. In the erase-suspend read mode with the same read sequence, DQ
not be toggled in the [1] and [3].
In the erase suspend read mode, DQ
outputted.
• DQ
The MBM29DL32XTE/BE devices feature Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the
devices will produce the complement of the data last written to DQ
Algorithm, an attempt to read the device will produce the true data last written to DQ
Erase Algorithm, an attempt to read the device will produce a “0” at the DQ
Data Polling
7
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Program
Suspended
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Erase Suspend Read
Erase Suspend Read
Erase Suspend Program
Program Suspend Read
Program Suspend Read
Erase Suspend Program
(Erase Suspended Sector)
(Non-Erase Suspended Sector)
(Non-Erase Suspended Sector)
(Program Suspended Sector)
(Non-Program Suspended Sector)
(Non-Erase Suspended Sector)
Status
Retired Product DS05-20881-8E_July 20, 2007
2
Hardware Sequence Flags
is toggled in the [1] and [3]. In case of [2], the data of memory cell is
80 / 90
6
is toggling in the case of [1] and [3]. In case of [2],
7
. Upon completion of the Embedded Program
2
is address sensitive. This means that if
2
Data
Data
Data
DQ
DQ
DQ
DQ
DQ
bit will toggle. However, DQ
2
0
1
0
to toggle.
7
7
7
7
7
7
output. Upon completion of the
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Data
Data
Data
DQ
1
2
bit.
6
7
. During the Embedded
Data Data
Data Data
Data Data
DQ
0
0
0
0
1
1
1
5
DQ
0
1
0
0
0
1
0
3
Toggle*
2
Toggle
Data
Data
Data
DQ
will not
N/A
N/A
1*
1
1
6
2
2
will
1