s908qy2ad1vdwer Freescale Semiconductor, Inc, s908qy2ad1vdwer Datasheet - Page 107

no-image

s908qy2ad1vdwer

Manufacturer Part Number
s908qy2ad1vdwer
Description
Mc68hc908qt4a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
12.4.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a 1
to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
When DDRBx is a 1, reading PTB reads the PTBx data latch. When DDRBx is a 0, reading PTB reads
the logic level on the PTBx pin. The data latch can always be written, regardless of the state of its data
direction bit.
Freescale Semiconductor
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Reset:
Read:
Write:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
port B I/O logic.
DDRB7
READ DDRB
WRITE DDRB
WRITE PTB
READ PTB
Bit 7
0
Figure 12-6. Data Direction Register B (DDRB)
DDRB6
MC68HC908QYA/QTA Family Data Sheet, Rev. 2
6
0
RESET
Figure 12-7. Port B I/O Circuit
DDRB5
5
0
DDRB4
NOTE
DDRBx
4
0
PTBx
DDRB3
3
0
Figure 12-7
DDRB2
2
0
PTBPUEx
DDRB1
1
0
shows the
DDRB0
PULLUP
Bit 0
0
PTBx
Port B
107

Related parts for s908qy2ad1vdwer