s908qy2ad1vdwer Freescale Semiconductor, Inc, s908qy2ad1vdwer Datasheet - Page 110

• Manufacturer Part Number: s908qy2ad1vdwer
• Description: Mc68hc908qt4a Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
13.3 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, BUSCLKX2, as shown in
110
PIN LOGIC
RESET
INTERNAL
PULL-UP
V
DD
SIM RESET STATUS REGISTER
RESET PIN CONTROL
POR CONTROL
STOP/WAIT
CONTROL
CONTROL
AND PRIORITY DECODE
INTERRUPT CONTROL
OSCILLATOR
OSCILLATOR
CLOCK
MC68HC908QYA/QTA Family Data Sheet, Rev. 2
FROM
FROM
Figure 13-1. SIM Block Diagram
Figure 13-2. SIM Clock Signals
CLOCK GENERATORS
BUSCLKX4
BUSCLKX2
RESET
COUNTER
SIM
÷2
CONTROL
MASTER
RESET
÷
SIM COUNTER
2
SIM
GENERATORS
BUS CLOCK
LVI RESET (FROM LVI MODULE)
FORCED MON MODE ENTRY (FROM MENRST MODULE)
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSCILLATOR)
COP CLOCK
BUSCLKX4 (FROM OSCILLATOR)
BUSCLKX2 (FROM OSCILLATOR)
INTERNAL CLOCKS
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP TIMEOUT (FROM COP MODULE)
INTERRUPT SOURCES
CPU INTERFACE
Figure
Freescale Semiconductor
13-2.