s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 212

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface B (TIMB) Module
occurs, user software can respond to this event at a later time and determine the actual time of the event.
However, this must be done prior to another input capture on the same pin; otherwise, the previous time
value will be lost.
By recording the times for successive edges on an incoming signal, software can determine the period
and/or pulse width of the signal. To measure a period, two successive edges of the same polarity are
captured. To measure a pulse width, two alternate polarity edges are captured. Software should track the
overflows at the 16-bit module counter to extend its range.
Another use for the input capture function is to establish a time reference. In this case, an input capture
function is used in conjunction with an output compare function. For example, to activate an output signal
a specified number of clock cycles after detecting an input event (edge), use the input capture function to
record the time at which the edge occurred. A number corresponding to the desired delay is added to this
captured value and stored to an output compare register (see
both input captures and output compares are referenced to the same 16-bit modulo counter, the delay
can be controlled to the resolution of the counter independent of software latencies.
Reset does not affect the contents of the input capture channel register (TBCHxH–TBCHxL).
18.3.3 Output Compare
With the output compare function, the TIMB can generate a periodic pulse with a programmable polarity,
duration, and frequency. When the counter reaches the value in the registers of an output compare
channel, the TIMB can set, clear, or toggle the channel pin. Output compares can generate TIMB CPU
interrupt requests.
18.3.3.1 Unbuffered Output Compare
Any output compare channel can generate unbuffered output compare pulses as described in
Output
the new value over the old value currently in the TIMB channel registers.
An unsynchronized write to the TIMB channel registers to change an output compare value could cause
incorrect operation for up to two counter overflow periods. For example, writing a new value before the
counter reaches the old value but after the counter reaches the new value prevents any compare during
that counter overflow period. Also, using a TIMB overflow interrupt routine to write a new, smaller output
compare value may cause the compare to be missed. The TIMB may pass the new value before it is
written.
Use these methods to synchronize unbuffered changes in the output compare value on channel x:
212
When changing to a smaller value, enable channel x output compare interrupts and write the new
value in the output compare interrupt routine. The output compare interrupt occurs at the end of
the current output compare pulse. The interrupt routine has until the end of the counter overflow
period to write the new value.
When changing to a larger output compare value, enable TIMB overflow interrupts and write the
new value in the TIMB overflow interrupt routine. The TIMB overflow interrupt occurs at the end of
the current counter overflow period. Writing a larger value in an output compare interrupt routine
(at the end of the current pulse) could cause two output compares to occur in the same counter
overflow period.
Compare. The pulses are unbuffered because changing the output compare value requires writing
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
18.8.5 TIMB Channel
Freescale Semiconductor
Registers). Because
18.3.3

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