s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 272
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s908ey8ad4cfjer
Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908EY8AD4CFJER.pdf
(278 pages)
- Current page: 272 of 278
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Revision History
Changes from Rev 4.0 published in February 2003 to Rev 5.0 published in September 2003
Changes from Rev 3.0 published in November 2002 to Rev 4.0 published in February 2003
Changes from Rev 2.0 published in May 2002 to Rev 3.0 published in November 2002
272
Electrical Specifications
Properly (COP) Module
Configuration Registers
Properly (COP) Module
External Interrupt (IRQ)
Development Support
Break Module (BRK)
Computer Operating
Computer Operating
Low-Voltage Inhibit
System Integration
System Integration
Generator (ICG)
FLASH Memory
Specifications
Module (SIM)
Module (SIM)
Internal Clock
Memory Map
(CONFIG1 &
(LVI) Module
Throughout
CONFIG2)
Electrical
Section
Memory
Section
Section
Module
Page (in Rev 5.0)
Page (in Rev 4.0)
Page (in Rev 3.0)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
N/A
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263
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280
281
285
106
118
137
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191
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40
69
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94
Reformatted document to current publications standards
Updated procedures for FLASH page erase operation
Updated procedures for FLASH mass erase operation
Updated block diagram
Updated definition for SBSW bit of SIM break status register (SBSR)
Updated definition for SBSW bit of SIM break status register (SBSR)
Updated memory characteristics table with new information
Corrected notes to supply currents in 20.5 DC Electrical Characteristics.
Updated parameters for output high voltage (V
and supply current (I
Updated parameters for low voltage inhibit reset: V
Updated parameters for ADC absolute accuracy, zero input reading, full-scale
reading, zero input reading (8-bit truncated mode) and full-scale reading
(8-bit truncated mode).
LVI5OR3 bit added to CONFIG1
ESCI vectors re-ordered
Minimum changed to 4ms in step 6.
Figure 6-5 updated
Figure 6-6 updated
Code example removed from SBSW description
PTB6/OSC1 and PTB7/OSC2 corrected to PTC4/OSC1 and PTC3/OSC2
respectively
COPD corrected to COPRS in COPRS bit description
LVI5OR3 bit added to CONFIG1 and default reset state changed to 0
LVI5OR3 description added
Code example removed from SBSW description
COPL corrected to COPRS in Figure 11-1
COPL corrected to COPRS in top paragraph
COPL corrected to COPRS in Section 11.4.8
IRQ1 corrected to IRQ
3rd bullet added to features
IRQ1 corrected to IRQ
DD
)
Description of change
Description of change
Description of change
OH
), output low voltage (V
TRIPF
Freescale Semiconductor
, V
TRIPR
and V
HYS
OL
.
)
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