s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 221

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor
Setting MS0B disables the channel 1 status and control register and reverts TBCH1 to
general-purpose I/O.
Reset clears the MSxB bit.
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation. See
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin once PWM, input
capture, or output compare operation is enabled. See
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port B, and pin PTBx/TBCHx
is available as a general-purpose I/O pin. However, channel x is at a state determined by these bits
and becomes transparent to the respective pin when PWM, input capture, or output compare mode is
enabled.
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
MSxB
X
X
0
0
0
0
0
0
0
1
1
1
Table 18-2
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIMB status and control register (TBSC).
Before enabling a TIMB channel register for input capture operation, make
sure that the PTBx/TBCHx pin is stable for at least two bus clocks.
MSxA
X
X
X
0
1
0
0
0
1
1
1
1
ELSxB
shows how ELSxB and ELSxA work. Reset clears the ELSxB and ELSxA bits.
0
0
0
1
1
0
0
1
1
0
1
1
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Table 18-2. Mode, Edge, and Level Selection
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
Table
Output compare
18-2.
Buffered output
buffered PWM
Output preset
Input capture
compare or
or PWM
Mode
NOTE
NOTE
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Table
18-2. Reset clears the MSxA bit.
Configuration
I/O Registers
221