s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 87

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s908az32ag2cfue

Manufacturer Part Number
s908az32ag2cfue
Description
M68hc08 Microcontrollers 8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
7.7 SIM Registers
The SIM has three memory mapped registers.
7.7.1 SIM Break Status Register
The SIM break status register contains a flag to indicate that a break caused an exit from wait mode.
BW — SIM Break Wait
Freescale Semiconductor
This status bit is useful in applications requiring a return to wait mode after exiting from a break
interrupt. Clear BW by writing a 0 to it. Reset clears BW.
CGMXCLK
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
INT/BREAK
IAB
Address:
Reset:
CPUSTOP
Read:
Write:
NOTE: Previous data can be operand data or the STOP opcode, depending on the last
R/W
IDB
IAB
Figure 7-16. Stop Mode Recovery from Interrupt or Break
instruction
$FE00
Bit 7
R
R
Figure 7-17. SIM Break Status Register (SBSR)
STOP ADDR
STOP +1
.
= Reserved
Figure 7-15. Stop Mode Entry Timing
R
6
PREVIOUS DATA
MC68HC908AZ32A Data Sheet, Rev. 2
R
5
STOP ADDR + 1
STOP + 2
STOP RECOVERY PERIOD
NEXT OPCODE
R
4
Figure 7-15
STOP + 2
NOTE: Writing a 0 clears BW
R
3
SAME
shows stop mode entry timing.
SP
R
2
SAME
SP – 1
See Note
BW
SAME
1
0
SAME
SP – 2
Bit 0
R
SIM Registers
SP – 3
87

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