ad73460 Analog Devices, Inc., ad73460 Datasheet - Page 26

• Manufacturer Part Number: ad73460
• Description: Six-input Channel Analog Front End
• Manufacturer: Analog Devices, Inc.

AD73460
Program Memory (Host Mode) allows access to all internal
memory. External overlay access is limited by a single external
address line (A0). External program execution is not available
in host mode due to a restricted databus that is only 16 bits wide.
PMOVLAY Memory
0
1
2
DATA MEMORY
Data Memory (Full Memory Mode) is a 16-bit-wide space used
for the storage of data variables and for memory-mapped control
registers. The AD73460-80 has 16K words on Data Memory RAM
on-chip (the AD73460-40 has 8K words on Data Memory RAM
on-chip), consisting of 16,352 user-accessible locations in the
case of the AD73460-80 (8,160 user-accessible locations in the
case of the AD73460-40) and 32 memory-mapped registers.
Support also exists for up to two 8K external memory overlay
spaces through the external databus. All internal accesses complete
in one cycle. Accesses to external memory are timed using the wait
states specified by the DWAIT register.
INTERNAL
MEMORY
EXTERNAL
MEMORY
PROGRAM MEMORY
ACCESSIBLE WHEN
PMOVLAY = 1 OR 2
0x0000 – 0x1FFF
PM (MODE B = 0)
PMOVLAY = 0
8K EXTERNAL
PMOVLAY = 0
ACCESSIBLE WHEN
PMOVLAY = 1
8K INTERNAL
8K INTERNAL
ACCESSIBLE
AT ADDRESS
MODE B = 0
ACCESSIBLE WHEN
PMOVLAY = 2
ALWAYS
NOTES
1
2
3
Figure 13. Program Memory Map
Internal
External
Overlay 1
External
Overlay 2
WHEN MODE B = 1, PMOVLAY MUST BE SET TO 0
SEE TABLE III FOR PMOVLAY BITS
NOT ACCESSIBLE ON AD73422-40
OR
Table XIX. PMOVLAY Bits
3
3
ADDRESS
0x3FFF
0x2000–
0x3FFF
0x1FFF
0x2000
0x0000
A13
Not Applicable Not Applicable
0
1
0x2000–
0x3FFF
0x2000–
0x3FFF
INTERNAL
MEMORY
2
2
EXTERNAL
MEMORY
PM (MODE B = 1)
PROGRAM MEMORY
ACCESSIBLE WHEN
8K EXTERNAL
PMOVLAY = 0
PMOVLAY = 0
8K INTERNAL
ACCESSIBLE WHEN
PMOVLAY = 0
MODE B = 1
RESERVED
A12:0
13 LSBs of Address
Between 0x2000
and 0x3FFF
13 LSBs of Address
Between 0x2000
and 0x3FFF
RESERVED
1
3
3
ADDRESS
0x2000–
0x3FFF
0x3FFF
0x1FFF
0x2000
0x0000
0x0000–
0x1FFF
–26–
2
INTERNAL
MEMORY
Data Memory (Host Mode) allows access to all internal memory.
External overlay access is limited by a single external address
line (A0). The DMOVLAY bits are defined in Table XX.
DMOVLAY Memory A13
0
1
2
I/O Space (Full Memory Mode)
The AD73460 supports an additional external memory space
called I/O space. This space is designed to support simple
connections to peripherals (such as data converters and external
registers) or to bus interface ASIC data registers. I/O space
supports 2048 locations of 16-bit-wide data. The lower 11 bits
of the external address bus are used; the upper three bits are
undefined. Two instructions were added to the core ADSP-2100
family instruction set to read from and write to I/O memory space.
The I/O space also has four dedicated 3-bit wait state registers,
IOWAIT0-3, that specify up to seven wait states to be automatically
generated for each of four regions. The wait states act on address
ranges as shown in Table XXI.
Composite Memory Select (CMS)
The AD73460 has a programmable memory select signal that is
useful for generating memory select signals for memories mapped
to more than one space. The CMS signal is generated to have the
same timing as each of the individual memory select signals (PMS,
DMS, BMS, IOMS), but can combine their functionality.
Each bit in the CMSSEL register, when set, causes the CMS
signal to be asserted when the selected memory select is asserted.
For example, to use a 32K word memory to act as both program
and data memory, set the PMS and DMS bits in the CMSSEL
register and use the CMS pin to drive the chip select of the
memory; use either DMS or PMS as the additional address bit.
EXTERNAL
MEMORY
Address Range
0x000–0x1FF
0x200–0x3FF
0x400–0x5FF
0x600–0x7FF
ACCESSIBLE WHEN
0x2000 – 0x3FFF
DATA MEMORY
DMOVLAY = 0
ACCESSIBLE
AT ADDRESS
ACCESSIBLE WHEN
DMOVLAY = 1
ALWAYS
Internal
External
Overlay 1
External
Overlay 2
Figure 14. Data Memory Map
ACCESSIBLE WHEN
DMOVLAY = 2
Table XX. DMOVLAY Bits
Table XXI. Wait States
0x0000–
0x1FFF
Not Applicable
0
1
0x0000–
0x1FFF
Wait State Register
IOWAIT0
IOWAIT1
IOWAIT2
IOWAIT3
0x0000–
0x1FFF
DMOVLAY = 1, 2
DATA MEMORY
EXTERNAL 8K
8K INTERNAL
DMOVLAY = 0
32 MEMORY
REGISTERS
A12:0
Not Applicable
13 LSBs of Address
Between 0x2000
and 0x3FFF
13 LSBs of Address
Between 0x2000
and 0x3FFF
INTERNAL
MAPPED
WORDS
8160
OR
REV. A
ADDRESS
0x3FFF
0x3FE0
0x3FDF
0x1FFF
0x2000
0x0000