mt46v128m4bn Micron Semiconductor Products, mt46v128m4bn Datasheet - Page 42
mt46v128m4bn
Manufacturer Part Number
mt46v128m4bn
Description
512mb X4, X8, X16 Ddr Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT46V128M4BN.pdf
(83 pages)
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Figure 18:
WRITE
Figure 19:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. L; Core DDR Rev. A 4/07 EN
READ Command
WRITE Command
Note:
Note:
The WRITE command is used to initiate a burst write access to an active row as shown in
Figure 19. The value on the BA0, BA1 inputs selects the bank, and the address provided
on inputs A0–Ai
and configuration, see Table 2 on page 2) selects the starting column location.
ADDRESS
BA0, BA1
ADDRESS
BA0, BA1
RAS#
CAS#
RAS#
CAS#
WE#
EN AP = enable auto precharge; DIS AP = disable auto precharge.
EN AP = enable auto precharge; and DIS AP = disable auto precharge.
WE#
CKE
CK#
CS#
CKE
A10
CK#
CS#
A10
CK
CK
HIGH
HIGH
DON’T CARE
DIS AP
EN AP
Bank
DIS AP
DON’T CARE
Col
EN AP
Bank
Col
(
where Ai is the most significant column address bit for a given density
42
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512Mb: x4, x8, x16 DDR SDRAM
©2000 Micron Technology, Inc. All rights reserved.
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