ics9248-112 Integrated Device Technology, ics9248-112 Datasheet - Page 2

• Manufacturer Part Number: ics9248-112
• Description: Frequency Generator & Integrated Buffers For Celeron
• Manufacturer: Integrated Device Technology

General Description
The ICS9248-112 is a single chip clock solution for
designs using the 810/810E style chipset. It provides all
necessary clock signals for such a system.
Spread spectrum may be enabled through I
programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting
to
board design iterations or costly shielding. The ICS9248-
112
employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Serial programming I
stop clock programming and frequency selection.
Pin Configuration
1
0326C—09/18/03
ICS9248-112
4
3
Double strength
, 2
, 5
, 0
, 5
N
1
2
1
2
, 3
, 5
, 7
, 8
U
, 9
, 6
3
4
4
3
, 9
P
, 7
, 3
, 5
M
, 4
1
2
1
1
2
2
2
2
2
3
4
4
4
3
1
1
1
3
4
N I
1
, 5
, 9
2
, 9
2
3
4
6
7
0
2
6
8
B
, 3
1
, 0
, 4
3
8
4
4
3
, 8
4
7
E
, 2
1
3
2
4
1
2
R
, 6
7
0
1
, 8
, 1
3
3
, 6
1
R
G
3
P
F
P
F
P
P
S
S
4
F
F
2
S
S
G
C
I
R
F
V
X
X
V
O
V
S
S
S
4
R
C
C
C
D
C
8
S
E
D
1
2
D
D
D
P
D
E
N
N
A
M
P
M
6
0
1
3
2
E
F
C I
C I
C I
#
L
A
F
D
R
R
U
D
D
D
P
6
N I
K
T
Q
1
H
H
0
A
A
C
L
L
L
L
L
C I
A
1
z
(
z
I _
K
M
M
L
K
K
: 1
N
K
1
O
0
_
) 0
2
(
(
A
1
1
F
: 2
: 7
A
(
C interface allows changing functions,
: 1
M
P
) 7
) 0
C I
) 0
E
T
P
P
P
P
O
O
O
O
O
O
O
O
O
O
O
O
O
Y
W
N I
W
N I
N I
N I
N I
N I
N I
N I
W
W
N I
U
U
U
U
U
U
U
U
U
U
U
U
U
P
T
T
T
R
T
R
T
T
T
T
T
T
R
T
R
T
T
E
f I
f I
3
3
C
e r
C
c
G
3
3
L
3
L
3
A
d
a
p
C
D
3
L
L
3
3
3
G
2
2
2
3
3 .
3 .
a
3 .
3 .
o
3 .
o
3 .
v e
n
o
3 .
o
o
3 .
3 .
3 .
5 .
5 .
5 .
3 .
y r
y r
y s
o l
a
o r
o r
F
F
s
p
g
g
d
w
g
g
a t
, V
V
s i
V
V
V
V
V
V
V
V
V
V
V
, V
R
R
k c
t s
t s
c i
u
c i
c i
c i
c i
u
n
r e
3 (
h t
o t
E
E
n
n
c
n i
e
p
l a
l a
c
P
P
P
i F
i f
f
o
H
p
c
1
1
n i
n i
n i
n i
n i
e r
h
Q
Q
3
d
e
d
o l
e x
o l
o
f r
d
u
o
I C
I C
I C
p
4
o
4
n i
e x
o r
p
p
_
_
w
n i
o
p
p
p
p
p t
w
o
t u
e
3 .
p
k c
V
f
t s
k c
3 .
o r
d
r o
) F
o t
t u
A
A
u
u
u
u
u
w
r e
n i
n
r e
p
d
c
c
c
C
u
u r
1
1
p t
f t
f t
f t
f t
o f
P
P
m
o
b
u
o l
o l
o l
n
2
s t
s
o
o
8
O
o
2
8
a
4
u
u
C I
C I
s
, t
4
n
s
u
e r
e r
I r
e r
e r
u
u
M
k c
k c
k c
I f
M
w
8
5 .
f
s
s
u
X
M
n
u
, t
o l
r o
p t
p t
a
h
M
2
q
q
l l i
2
q
q
H
p
n i
V
p
H
2
=
=
C
c
a
n
C
H
a
w
n
u
o
u
o
u
o
u
u
t u
p
H
p
z
o l
z
3
c
d
g
s
o
n
, 0
, 1
s t
u
e
u
e
u
e
e
z
p
y l
y l
s
v i t
n i
3 .
p
z
e r
m
t o
k c
e r
p t
n
p t
n
p t
n
n
o
h t
r e
S
n i
o
o
p
A
A
f
y c
y c
c
y c
y c
w
f
V
e
n i
r o
u
D
e f
t u
t u
t u
w
r o
e f
e t
e
l a i
t u
o l
b
P
P
r e
o
p t
R
a
o l
r e
e r
s
e
e r
, s
, s
, s
C I
C I
n r
c
u
s
s
k c
s
s
H
C
y l l
u
n i
t u
A
e
e
w
y r
e
e
p t
s
g
n
n
p
l a
U
P
i w
i w
i w
t s
M
e l
e l
p
e l
e l
u
e r
C
C
c
o
c
D
p
t s
u
n i
1
B
, U
u
p
e
t a
e
u
o l
o l
2
y l
h t
t c
h t
t c
h t
t c
t c
. t
o l
E
4
l a
t a
n
. t
p
p
p t
C
c
u r
. e
c
k c
k c
3 .
t o
S
a
y l
t u
r e
b
b
b
b
o l
I
o l
a
u
d
S
S
S
C
n
O
1
. t i
. t i
. t i
. t i
T
e r
f t
f a
f
=
=
k c
k c
n
y
y
y
p
8
r o
2
c
h t
R
h
A
n
n
n
n i
M
n i
n I
n I
r o
n I
n I
a
e f
P
P
e
P
P I
s
a
c
c
c
o
o
p
C
C
C
g
p
p
p
p
H
o t
c
h
h
h
n
C I
u
n i
u
u
U
I T
t u
t u
t u
t u
e t
P
C I
C I
3 (
o r
o r
o r
. z
t a
s
p t
p
p t
3
e t
Power Groups
GNDREF, VDDREF = REF0, X1, X2
GNDPCI , VDDPCI = PCICLK [9:0]
GNDSDR, VDDSDR = SDRAM [7:0], SDRAM_F,
supply for PLL core
GND3V66 , VDD3V66 = 3V66
GND48 , VDD48 = 48MHz, 24_48MHz,
VDDLAPIC = IOAPIC
GNDLCPU , VDDLCPU = CPUCLK [1:0]
S
U
e
d
O
p
3
m
L
L
n
n
n
a l
a l
a l
a l
u
H
u
d
n r
B
2
e
p
K
K
o
o
o
b
&
N
. t
. t
. s
a
c t
c t
c t
c t
X
. d
) F
u
u
u
o t
l a
y
2 /
s
P
s
h
s
h
s
h
h
A
T
I
n i
I C
e
e
p
c
e
e
2
P
d (
a
C
C
C
h
C
d
d
o
o l
d
d
n
C I
e t
e
P
P
P
e
w
d
M
c
a f
t a
t a
t a
t a
U
U
U
n r
r e
s k
a l
e f
H
u
C
C
C
l a
p
p
e t
p
p
) t l
z
e
L
L
L
d
o
o
a
o
o
d
n
K
K
K
o
o l
w
w
e r
w
w
b
y c
w
S
S
S
r e
r e
r e
r e
a
a
n
d
d
k c
f o
s i
o
o
o
o
h t
. n
. n
. n
. n
a
h t
e
b
e l
e
d