w83195bg-912 Winbond Electronics Corp America, w83195bg-912 Datasheet - Page 20

• Manufacturer Part Number: w83195bg-912
• Description: Clock For Via Chipsets
• Manufacturer: Winbond Electronics Corp America

Register 15: Slew Rate Control (Default: 55h), continued
7.17 Register 16: DRAM Buffer Control (1 = Enable, 0 = Disable) (Default: 7Fh)
7.18 Register 17: Slew Rate Control (Default: CFh)
BIT
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CPUOD_S2
CPUOD_S1
FBOUT_EN
PCI_64_S2
PCI_64_S1
PCI_31_S2
PCI_31_S1
FBOUT_S2
FBOUT_S1
DDR3_S2
DDR3_S1
DDR0_S2
DDR0_S1
REF_S2
REF_S1
Reserve
NAME
DDR5
DDR4
DDR3
DDR2
DDR1
DDR0
Name
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
PWD
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
PCI6, 5,4 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
PCI3, 2,1 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
REF0, REF1 slew rate control
11 : Strong , 00 : Weak , 10/01 : Norma
Function Description
Reserve
FBOUT output control
DDRT5, DDRC5 output control
DDRT4, DDRC4 output control
DDRT3, DDRC3 output control
DDRT2, DDRC2 output control
DDRT1, DDRC1 output control
DDRT0, DDRC0 output control
FBOUT slew rate control
11: Strong, 00: Weak, 10/01: Normal
CPUODT/C slew rate control
11: Strong, 00: Weak, 10/01: Normal
DDR3, 4,5/SDRAM6, 7,8,9,10,11 slew rate control
11: Strong, 00: Weak, 10/01: Normal
DDR0, 1,2/SDRAM 0,1,2,3,4,5 slew rate control
11: Strong, 00: Weak, 10/01: Normal
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FUNCTION DESCRIPTION
W83195BG-912