hef4017b NXP Semiconductors, hef4017b Datasheet - Page 2

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hef4017b

Manufacturer Part Number
hef4017b
Description
5-stage Johnson Counter
Manufacturer
NXP Semiconductors
Datasheet

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DESCRIPTION
The HEF4017B is a 5-stage Johnson decade counter with
ten spike-free decoded active HIGH outputs (O
active LOW output from the most significant flip-flop (O
active HIGH and active LOW clock inputs (CP
an overriding asynchronous master reset input (MR).
The counter is advanced by either a LOW to HIGH
transition at CP
transition at CP
table).
When cascading counters, the O
while the counter is in states 5, 6, 7, 8 and 9, can be used
to drive the CP
January 1995
HEF4017BP(N):
HEF4017BD(F):
HEF4017BT(D):
( ): Package Designator North America
5-stage Johnson counter
0
0
1
input of the next counter.
while CP
while CP
Fig.2 Pinning diagram.
16-lead DIL; plastic (SOT38-1)
16-lead DIL; ceramic (cerdip) (SOT74)
16-lead SO; plastic (SOT109-1)
1
0
is LOW or a HIGH to LOW
is HIGH (see also function
5-9
output, which is LOW
0
o
Fig.1 Functional diagram.
, CP
to O
1
9
) and
), an
5-9
),
2
A HIGH on MR resets the counter to zero
(O
clock inputs (CP
Automatic code correction of the counter is provided by an
internal circuit: following any illegal code the counter
returns to a proper counting mode within 11 clock pulses.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
PINNING
FAMILY DATA, I
See Family Specifications
CP
CP
MR
O
O
o
0
5-9
0
1
= O
to O
5-9
9
= HIGH; O
clock input (LOW to HIGH triggered)
clock input (HIGH to LOW triggered)
master reset input
decoded outputs
carry output (active LOW)
0
DD
, CP
LIMITS category MSI
1
1
).
to O
9
= LOW) independent of the
Product specification
HEF4017B
MSI

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