hef4024b NXP Semiconductors, hef4024b Datasheet - Page 2
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hef4024b
Manufacturer Part Number
hef4024b
Description
7-stage Binary Counter
Manufacturer
NXP Semiconductors
Datasheet
1.HEF4024B.pdf
(5 pages)
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Philips Semiconductors
DESCRIPTION
The HEF4024B is a 7-stage binary ripple counter with a
clock input (CP), and overriding asynchronous master
reset input (MR) and seven fully buffered parallel outputs
(O
transition of CP. A HIGH on MR clears all counter stages
and forces all outputs LOW, independent of CP. Each
counter stage is a static toggle flip-flop.
January 1995
HEF4024BP(N):
HEF4024BD(F):
HEF4024BT(D):
( ): Package Designator North America
7-stage binary counter
0
to O
6
). The counter advances on the HIGH to LOW
Fig.2 Pinning diagram.
14-lead DIL; plastic
14-lead DIL; ceramic (cerdip)
14-lead SO; plastic
(SOT27-1)
(SOT73)
(SOT108-1)
Fig.1 Functional diagram.
2
PINNING
APPLICATION INFORMATION
Some examples of applications for the HEF4024B are:
FAMILY DATA, I
See Family Specifications
CP
MR
O
Frequency dividers
Time delay circuits
0
to O
6
DD
clock input (HIGH to LOW triggered)
master reset input
buffered parallel outputs
LIMITS category MSI
Product specification
HEF4024B
MSI