pcf2042w NXP Semiconductors, pcf2042w Datasheet - Page 7

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pcf2042w

Manufacturer Part Number
pcf2042w
Description
Pcf2042 V2 Memory Card Ic
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
5.1.2
Any bit sequence transmitted from the interface device
(IFD) to the IC is embedded between a START condition
and a STOP condition:
START condition:
STOP condition:
5.1.3
After the transmission of a bit sequence from interface
device (IFD) to IC, two operational modes of the IC are to
be distinguished.
5.1.3.1
1997 Feb 03
falling edge on I/O during CLK is HIGH
rising edge on I/O during CLK is HIGH
In this mode the IC is processing internally. No data bits
are sent.
During processing the IC has to be clocked continuously
by the IFD. In this phase the I/O is set to LOW by the IC.
The IC signals the end of its internal processing by
setting I/O to HIGH.
Memory card IC
C
O
OMMAND
UTGOING
Processing Mode
M
D
ODE
ATA
/P
- IFD
ROCESSING
TO
IC
M
ODE
- IC
Fig.4 The command phase.
TO
IFD
7
Between the last bit of a bit sequence transmitted from IFD
to IC and the STOP condition, an additional clock pulse is
mandatory in order to set I/O to HIGH.
If not exactly 24 bits are transmitted from IFD, the IC
responds with processing mode.
The IC only indicates the ‘End of Processing’ to the IFD.
The IC provides no information about the result of the
‘processing’.
The IC discards any START/STOP condition during
processing mode.
Any further clock that follows when processing mode is
completed will not change the level on I/O.
PCF2042 V2
Product Specification

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