pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 22
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pcf8814
Manufacturer Part Number
pcf8814
Description
Pcf8814 65 X 96 Pixels Matrix Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8814.pdf
(72 pages)
Philips Semiconductors
10.2
The PCF8814 is a slave receiver/transmitter. If data is to
be read from the device the SDAHOUT pad must be
connected, otherwise SDAHOUT need not be used.
Hs-mode can only commence after the following
conditions:
The master code has two functions as shown in
Figs 26 and 27. It allows arbitration and synchronization
between competing masters at Fast-mode speeds,
resulting in one winner.The master code also indicates the
beginning of an Hs-mode transfer.
As no device is allowed to acknowledge the master code,
the master code is followed by a not-acknowledge (A).
After this A bit, and the SCLH line has been pulled up to a
HIGH level, the active master switches to Hs-mode and
enables at t
SCLH signal (see Fig.27).
The active master will then send a repeated START
condition (Sr) followed by a 7-bit slave address with a R/W
bit, and receives an acknowledge bit (A) from the selected
slave. After each acknowledge bit (A) or not-acknowledge
bit (A) the active master disables its current-source pull-up
circuit. The active master re-enables its current source
again when all devices have released, and the SCLH
signal reaches a HIGH level. The rising of the SCLH signal
is done by a resistor pull-up and so is slower, the last part
of the SCLH rise time is speeded up because the current
source is enabled. Data transfer only switches back to
Fast-mode after a STOP condition (P).
A write sequence after the Hs-mode is selected is given in
Fig.28. The sequence is initiated with a START
condition (S) from the I
the slave address. All slaves with the corresponding
address acknowledge in parallel, all the others will ignore
the I
After the acknowledgement cycle of a write (W), one or
more command words follow which define the status of the
addressed slaves. A command word consists of a control
byte, which defines CO and D/C, plus a data byte (see
Fig.28 and Table 4).
2003 Mar 13
START condition (S)
8-bit master code (0000 1XXX)
not-acknowledge bit (A).
65
2
C-bus transfer.
I
2
C-bus Hs-mode protocol
96 pixels matrix LCD driver
H
the current-source pull-up circuit for the
2
C-bus master which is followed by
22
Table 4 Definition of CO
Table 5 Definition of D/C
The last control byte is tagged with a cleared most
significant bit, the continuation bit CO. The control and
data bytes are also acknowledged by all addressed slaves
on the bus.
After the last control byte, depending on the D/C bit setting,
either a series of display data bytes or command data
bytes may follow. If the D/C bit was set to logic 1, these
display bytes are stored in the display RAM at the address
specified by the data pointer. The data pointer is
automatically updated and the data is directed to the
intended PCF8814 device. If the D/C bit of the last control
byte was set to logic 0, these command bytes will be
decoded and the setting of the device will be changed
according to the received commands. The
acknowledgement after each byte is made only by the
addressed PCF8814. At the end of the transmission the
I
back to Fast-mode, however, to reduce the overhead of
the master code, it is possible that a master links a number
of Hs-mode transfers, separated by repeated START
conditions (Sr).
A read sequence is shown in Fig.29 and again this
sequence follows after the Hs-mode is selected. The
device will immediately start to output the requested data
until a not acknowledge is transmitted by the master.
Before the read access, the user has to set the D/C bit to
the appropriate value by a preceding write access. The
write access should be terminated by a RE-START
condition so that the Hs-mode is not disabled.
2
D/C
C-bus master issues a STOP condition (P) and switches
CO
0
1
0
1
last control byte to be sent; only a stream of data
bytes are allowed to follow; this stream may only
be terminated by a STOP or RE-START condition
another control byte will follow this control byte
unless a STOP or RE-START condition is
received
R/W
0
1
0
1
data byte will be decoded and used to set
up the device
data byte will return the status byte
data byte will be stored in the display RAM
RAM read-back is not supported
ACTION
ACTION
Objective specification
PCF8814