pca8534a NXP Semiconductors, pca8534a Datasheet - Page 30

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pca8534a

Manufacturer Part Number
pca8534a
Description
Universal Lcd Driver For Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet

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11. Dynamic characteristics
Table 18.
V
[1]
[2]
PCA8534A_2
Product data sheet
Symbol
Clock
Internal: output pin CLK
f
External: input pin CLK
f
t
t
Synchronization: input pin SYNC
t
t
Outputs: pins BP0 to BP3 and S0 to S59
t
I
Pin SCL
f
t
t
Pin SDA
t
t
Pins SCL and SDA
t
t
t
t
t
t
C
t
osc
clk(ext)
clk(H)
clk(L)
PD(SYNC_N)
SYNC_NL
PD(drv)
2
SCL
LOW
HIGH
SU;DAT
HD;DAT
BUF
SU;STO
HD;STA
SU;STA
r
f
w(spike)
DD
C-bus: timing
b
= 1.8 V to 5.5 V; V
Typical output (duty cycle δ = 50 %).
All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to V
input voltage swing of V
Dynamic characteristics
Parameter
oscillator frequency
external clock frequency
HIGH-level clock time
LOW-level clock time
SYNC propagation delay
SYNC LOW time
driver propagation delay
SCL frequency
LOW period of the SCL clock
HIGH period of the SCL clock
data set-up time
data hold time
bus free time between a STOP and
START condition
set-up time for STOP condition
hold time (repeated) START condition
set-up time for a repeated START
condition
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
capacitive load for each bus line
spike pulse width
[2]
SS
SS
= 0 V; V
to V
DD
LCD
.
= 2.5 V to 6.5 V; T
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 1 June 2010
amb
Conditions
V
V
V
DD
DD
LCD
=
= 5 V
= 5 V
= 5 V
40
°
C to +85
Universal LCD driver for low multiplex rates
°
C; unless otherwise specified.
[1]
130
-
Min
960
797
130
-
1
-
-
1.3
0.6
100
0
1.3
0.6
0.6
0.6
-
-
-
Typ
1536
1536
-
-
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PCA8534A
© NXP B.V. 2010. All rights reserved.
Max
3046
3046
-
-
-
-
30
400
-
-
-
-
-
-
-
-
0.3
0.3
400
50
IL
and V
IH
30 of 44
Unit
Hz
Hz
μs
μs
ns
μs
μs
kHz
μs
μs
ns
ns
μs
μs
μs
μs
μs
μs
pF
ns
with an

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