pca8802 NXP Semiconductors, pca8802 Datasheet - Page 10

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pca8802

Manufacturer Part Number
pca8802
Description
Smartcard Rtc; Ultra Low Power Oscillator With Integrated Counter For Initiating One Time Password Generation
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PCA8802_1
Product data sheet
9.5.2 Bit transfer
9.5.3 Bit order
9.5.4 START and STOP conditions
9.5.5 System configuration
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as a control signal. Bit transfer is shown in
Data is transferred MSB first.
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line, while the clock is HIGH is defined as the START condition (S).
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P). The START and STOP conditions are shown in
The data on SDA is sampled with the rising edge of SCL. Data is output to SDA on the
falling edge of SCL.
A device generating a message is a transmitter, a device receiving a message is the
receiver. The device that controls the message is the master and the device which is
controlled by the master is the slave.
Fig 13. Bit transfer
Fig 14. Bit transfer
Fig 15. Definition of START and STOP conditions
SDA
SCL
START condition
SDA
SCL
S
Rev. 01 — 19 February 2009
MSB
b
7
data valid
data line
b
stable;
6
b
5
b
4
b
change
allowed
of data
3
b
2
b
001aaj212
1
LSB
b
0
Figure
Figure
STOP condition
mba607
P
13.
15.
PCA8802
© NXP B.V. 2009. All rights reserved.
Smartcard RTC
mbc622
SDA
SCL
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