stlc5464 STMicroelectronics, stlc5464 Datasheet - Page 44

• Manufacturer Part Number: stlc5464
• Description: Multi-hdlcwith Switching Matrix Associated
• Manufacturer: STMicroelectronics

STLC5464
VI - MEMORY TIMING (continued)
VI.2 - Static Memories
Figure 33 : Static Memory Read Signals from the Multi-HDLC
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Symbol
Twz
Th
1/f
Ts
T
a
Delay between Data Strobe delivered by the mP and beginning of
cycle
f: Masterclock frequency
Total read cycle: Twz + 1/f
Delay between Masterclock and Edge of each signal delivered by the
MHDLC (30pF)
NOE width
Set-up Time Data /NOE Rising Edge
Hold Time Data /NOE Rising Edge
NDS fro m P
(or equivalent)
MASTERCLOCK
applied to XTAL1 P in
ADM0/18
NCE0/7
NWE
NOE
DM0/15 from
S RAM Circuit
Note : S e e
MBL De finition
HZ
HZ
T
a
Parameter
a
Each signa l de livere d by the MHDLC
is high impeda nce outside this time
Tota l Rea d Cycle
Twz
Ts
a
Th
Min.
2/f
1/f
20
a
0
HZ
HZ
Typ.
20
1/f
Max.
4/f
1/f
Unit
ns
ns
ns
ns