adc1212d NXP Semiconductors, adc1212d Datasheet - Page 6
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adc1212d
Manufacturer Part Number
adc1212d
Description
Adc1212d Series Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
Manufacturer
NXP Semiconductors
Datasheet
1.ADC1212D.pdf
(42 pages)
NXP Semiconductors
ADC1212D_SER
Product data sheet
6.2.2 Pin description
Table 3.
[1]
[2]
Symbol
DB10_DB11_M 25
DB10_DB11_P
DB8_DB9_M
DB8_DB9_P
DB6_DB7_M
DB6_DB7_P
DB4_DB5_M
DB4_DB5_P
DB2_DB3_M
DB2_DB3_P
DB0_DB1_M
DB0_DB1_P
n.c.
n.c.
DAVM
DAVP
n.c.
n.c.
DA0_DA1_P
DA0_DA1_M
DA2_DA3_P
DA2_DA3_M
DA4_DA5_P
DA4_DA5_M
DA6_DA7_P
DA6_DA7_M
DA8_DA9_P
DA8_DA9_M
DA10_DA11_P
DA10_DA11_M 58
Pins 1 to 24, pin 59 to 64 and pins 31, 32, 49 and 50 are the same for both CMOS and LVDS DDR outputs
(see
P: power supply; G: ground; I: input; O: output; I/O: input/output.
Table
Pin description (LVDS DDR) digital outputs)
2).
All information provided in this document is subject to legal disclaimers.
27
28
29
30
33
34
35
36
37
38
39
40
43
44
45
46
47
48
51
52
53
54
55
56
Pin
26
41
42
57
Type
O
O
O
O
O
O
O
O
O
O
O
O
-
-
O
O
-
-
O
O
O
O
O
O
O
O
O
O
O
O
Rev. 2 — 4 March 2011
[2]
Description
differential output data DB10 and DB11 multiplexed,
complement
differential output data DB10 and DB11 multiplexed, true
differential output data DB8 and DB9 multiplexed, complement
differential output data DB8 and DB9 multiplexed, true
differential output data DB6 and DB7 multiplexed, complement
differential output data DB6 and DB7 multiplexed, true
differential output data DB4 and DB5 multiplexed, complement
differential output data DB4 and DB5 multiplexed, true
differential output data DB2 and DB3 multiplexed, complement
differential output data DB2 and DB3 multiplexed, true
differential output data DB0 and DB1 multiplexed, complement
differential output data DB0 and DB1 multiplexed, true
not connected
not connected
data valid output clock, complement
data valid output clock, true
not connected
not connected
differential output data DA0 and DA1 multiplexed, true
differential output data DA0 and DA1 multiplexed, complement
differential output data DA2 and DA3 multiplexed, true
differential output data DA2 and DA3 multiplexed, complement
differential output data DA4 and DA5 multiplexed, true
differential output data DA4 and DA5 multiplexed, complement
differential output data DA6 and DA7 multiplexed, true
differential output data DA6 and DA7 multiplexed, complement
differential output data DA8 and DA9 multiplexed, true
differential output data DA8 and DA9 multiplexed, complement
differential output data DA10 and DA11 multiplexed, true
differential output data DA10 and DA11 multiplexed,
complement
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
ADC1212D series
[1]
© NXP B.V. 2011. All rights reserved.
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