adc1006s055 NXP Semiconductors, adc1006s055 Datasheet
adc1006s055
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adc1006s055 Summary of contents
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... Single 10 bits ADC MHz or 70 MHz Rev. 02 — 12 August 2008 1. General description The ADC1006S055/070 are a family of Bipolar CMOS (BiCMOS) 10-bit Analog-to-Digital Converters (ADC) optimized for a wide range of applications such as cellular infrastructures, professional telecommunications, imaging, and digital radio. It converts the analog input signal into 10-bit binary coded digital words at a maximum sampling rate of 70 MHz ...
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... Description plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz = V37 to V38 and CCD I(INN)(p-p) VREF CCA3 = and V ...
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... AMP ANALOG-TO-DIGITAL 43 CONVERTER CMADC REFERENCE 5 ADC1006S055/070 AGND1 AGND3 AGND4 Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz CE CLK V V OTC CCD1 CCD2 CLOCK DRIVER CMOS OUTPUTS LATCHES OVERFLOW/ CMOS UNDERFLOW ...
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... V) 16 not connected 17 digital ground 2 Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 33 V CCO 32 n. ...
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... Limiting values Parameter Conditions analog supply voltage digital supply voltage output supply voltage supply voltage difference input voltage on pin IN referenced to AGND input voltage on pin INN Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz Min Max [1] 0.3 +7.0 [1] 0.3 +7.0 [1] 0.3 +7.0 ...
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... MHz MHz clk i [2] PECL mode CCD TTL mode C Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz Conditions Min differential clock - drive at pins 35 and may have any value between 0.3 V and +7.0 V provided that ...
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... MHz i clk I(IN)(p-p) I(INN)(p- 1.75 V; ref CCA3 1.6 V I(cm) CCA3 Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz = V37 to V38 and V15 to V17 = 4. 5. +85 C; amb 1.6 V; typical values measured at V [1] Min Typ Max 3.83 - 4.12 2 ...
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... CCA CCD CCO amb 3 dB; full-scale input C Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz = V37 to V38 and V15 to V17 = 4. 5. +85 C; amb 1.6 V; typical values measured at V [1] Min Typ Max - V 1.75 - CCA3 ...
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... V; V I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter Harmonics second harmonic 2H level third harmonic level ADC1006S055H (f 3H [5] Total harmonic distortion THD total harmonic distortion Thermal noise N RMS thermal noise shorted input HIGH; th(RMS) ADC1006S055_070_2 Product data sheet CCD = V 1.75 V ...
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... I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter [6] Signal-to-noise ratio S/N signal-to-noise ratio ADC1006S055H (f Spurious free dynamic range; see SFDR spurious free dynamic range [7] Effective number of bits ENOB effective number of bits Intermodulation MHz; f clk intermodulation IM suppression ...
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... CLKN input is at PECL level and sampling is taken on the rising edge of the clock input CCD Figure 5. Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz = V37 to V38 and V15 to V17 = 4. 5. +85 C; amb 1.6 V; typical values measured at V [1] Min Typ Max - 0. 6 ...
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... Mode selection Sample-and-hold selection Sample-and-hold active inactive; tracking mode Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz = V 1.75 V CCA3 Binary outputs Two’s complement outputs 00 0000 0000 10 0000 0000 00 0000 0000 10 0000 0000 ...
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... DATA CCD output data t dLZ HIGH output data LOW 10 % ADC1006S 070 Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz sample sample h(o) DATA DATA d( dHZ dZH HIGH 90 % LOW t dZL 50 % ...
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... Fig 6. Total Harmonic Distortion (THD function 014aaa446 S/N (dB) (1) ( (MHz) i (1) 55 MHz. (2) 70 MHz. Fig 8. Signal-to-Noise Ratio (S/ function of Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz ( input frequency (sample device) 60.0 (1) 59 ...
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... Fig 10. Two-tone MHz ADC1006S055_070_2 Product data sheet MHz clk 20.1 MHz MHz i clk Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 014aaa448 (MHz) i 014aaa449 (MHz) i © NXP B.V. 2008. All rights reserved. 30 ...
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... Fig 12. Differential Non-Linearity (DNL) ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz 256 512 256 512 Rev. 02 — 12 August 2008 ADC1006S055/070 014aaa450 768 1024 output code 014aaa451 768 1024 output code © NXP B.V. 2008. All rights reserved ...
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... ADC1006S055_070_2 Product data sheet (1) (2) ( i(IN)(p-p) i(INN)(p- i(IN)(p-p) i(INN)(p-p) Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 014aaa452 20 10 Input amplitude (dBFS MHz clk 014aaa453 20 10 Input amplitude (dBFS MHz clk © NXP B.V. 2008. All rights reserved. ...
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... ADC1006S055_070_2 Product data sheet 10.0 (bit) V I(IN)(p-p) (1) 9.5 V (2) I(INN)(p-p) (V) 9.0 8.5 (3) 8.0 7.5 7.0 6.5 6.0 1.9 2.0 2.1 2.2 (V) 014aaa455 Fig 16. ADC full-scale MHz i Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 2.6 2.2 1.8 1.4 1.0 1.3 1.4 1.5 1.6 1.7 1.8 1 (V) CCA VREF V I(IN)(p-p) I(INN)(p-p) function CCA VREF © NXP B.V. 2008. All rights reserved. 2.0 2.1 2.2 ...
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... PECL translator Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz SH mode 100 nF 100 ADC1006S055/070 n.c. n. (MSB) 100 nF chip select input output format select CLKN ADC1006S ...
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... NXP Semiconductors Fig 19. Application diagram for TTL single-ended clock ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz CLKN ADC1006S 055/070 CLK TTL input 014aaa459 Rev. 02 — 12 August 2008 © NXP B.V. 2008. All rights reserved ...
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... CCA V CC FL4 P1 C14 C7 100 nF 330 nF ICI OUT MC78MO5CDT C2 4.7 F GND ( 750 LGT679 Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz OTC 18 ...
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... C11 TP2 FL3 C13 C19 C16 C15 FL1 C17 C18 Rev. 02 — 12 August 2008 ADC1006S055/070 TM2 IC2 C14 C12 FL2 B11 TM1 1 014aaa466 C8 014aaa467 © ...
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... NXP Semiconductors Fig 23. Printed-circuit board layout (top layer) Fig 24. Printed-circuit board layout (ground layer) ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 1 2 Rev. 02 — 12 August 2008 014aaa461 014aaa462 © NXP B.V. 2008. All rights reserved ...
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... The recommended companion chip is the TDA9901 wideband differential digital controlled variable gain amplifier. ADC1006S055_070_2 Product data sheet Alternative parts Description Single 12 bits ADC Single 12 bits ADC Single 12 bits ADC Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 3 014aaa463 Sampling frequency [1] 40 MHz [1] 55 MHz [1] 70 MHz © ...
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... where M is the number of cycles and N is number Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz SFDR measured output range (MHz) ...
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... P signal = 10 log ---------------- - P noise log ----------------- - max s Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz is the power of the terms which include the noise signal 1 (3) (4) (5) (6) © NXP B.V. 2008. All rights reserved ...
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... Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz IMD3 measured output range (MHz) , these frequencies being chosen according – ...
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... 2.5 scale (1) ( 0.4 0.25 10.1 10.1 12.9 0.8 0.2 0.14 9.9 9.9 12.3 REFERENCES JEDEC JEITA Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION SOT307 ...
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... ADC1006S055_070_1 20080611 ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz Data sheet status Change notice Product data sheet - Figure 13 and 14. Figure 4. Product data sheet - Rev. 02 — 12 August 2008 ADC1006S055/070 Supersedes ADC1006S055_070_1 - © NXP B.V. 2008. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 12 August 2008 ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz © NXP B.V. 2008. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com ADC1006S055/070 All rights reserved. Date of release: 12 August 2008 Document identifier: ADC1006S055_070_2 ...