tda8757hl NXP Semiconductors, tda8757hl Datasheet
tda8757hl
Related parts for tda8757hl
tda8757hl Summary of contents
Page 1
TDA8757 Triple 8-bit ADC 170 Msps Rev. 07 — 28 February 2002 1. General description The TDA8757 is a triple 8-bit ADC for the digitizing of large bandwidth RGB/YUV signals at a sampling rate up to 170 Msps. The IC ...
Page 2
Philips Semiconductors 3. Applications RGB/YUV high-speed digitizing LCD panels drive LCD projection systems VGA to UXGA (1600 4. Quick reference data Table 1: Quick reference data Symbol Parameter V analog supply voltage for PLL CCA and the RGB channels V ...
Page 3
... PLL phase jitter PLL(max)(p-p) (peak-to-peak value) 5. Ordering information Table 2: Ordering information Type number Package Name Description TDA8757HL HLQFP144 plastic, heatsink low profile quad flat package; 144 leads; body 20 9397 750 09457 Preliminary data Conditions Min 100 f = 170 MHz; sinusoidal ...
Page 4
Philips Semiconductors 6. Block diagram AGC R 7 GAINC DEC R 3 VREF 15 AGC G 17 GAINC DEC G 26 AGC B 28 GAINC ...
Page 5
Philips Semiconductors CLP V P 150 k IN VREF DAC 5 REGISTER FINE GAIN ADJUST Fig 2. Channel diagram (where 9397 750 09457 Preliminary data CLP AGC CLAMP CONTROL DAC CKADC REGISTER MUX AGC ADC ...
Page 6
Philips Semiconductors COAST 2 I C-bus: 1 bit / (Vlevel) CKREF PHASE FREQUENCY 2 I C-bus: DETECTOR 1 bit 2 I C-bus: 5 bits (Edge) (Ip, Up, Do) DIV N (100 to 4095 C-bus: 12 bits (1) Enable ...
Page 7
... Fig 4. Pin configuration. 7.2 Pin description Table 3: Symbol n.c. DEC2 VREF DEC1 9397 750 09457 Preliminary data TDA8757HL Pin description Pin Description 1 not connected 2 main regulator decoupling input 2 3 gain stabilizer voltage reference input 4 main regulator decoupling input 1 Rev. 07 — 28 February 2002 ...
Page 8
Philips Semiconductors Table 3: Symbol AGC R BOT R GAINC CLP R DEC R V CCA( n.c. AGND n.c. AGC G BOT G GAINC CLP G DEC G V CCA( AGND IN SOG SOG O n.c. ...
Page 9
Philips Semiconductors Table 3: Symbol SDA V DDD V SSD1 SCL n.c. n.c. n.c. n.c. V CCD2 DGND2 n.c. V SSD2 V SSD3 n. ...
Page 10
Philips Semiconductors Table 3: Symbol OGND V CCO(G) OGND V CCO( ...
Page 11
Philips Semiconductors Table 3: Symbol V CCO(PLL) n.c. DGND1 OE PD CLP HSYNC INV CKEXT COAST CKREF V CCD1 n.c. AGND CP CZ AGND V CCA(PLL) n.c. GND DP 8. Functional description This triple high-speed 8-bit ADC is designed to ...
Page 12
Philips Semiconductors Fig 5. Sync level diagram. If this function is not used, pin IN supply. In this event, pin SOG 8.2 Clamps Three independent parallel clamping circuits are used to clamp the video input signals on several black levels. ...
Page 13
Philips Semiconductors 8.2.1 Variable gain amplifiers Three independent variable gain amplifiers are used to provide a full-scale input signal to the 8-bit ADC for each channel. The gain adjustment range is designed so that for an input range varying from ...
Page 14
Philips Semiconductors 8.2.3 ADCs Three ADCs convert analog signals into three series of 8-bit codes, with a maximum clock frequency of 170 Msps. The ADCs input range (p-p) full-scale and the pipeline delay is 1 clock cycle ...
Page 15
Philips Semiconductors The reference clock (CKREF) range is between 15 and 150 kHz. Consequently, the VCO minimum frequency is 12 MHz and the maximum frequency is 170 MHz. The gain of the VCO part can be controlled through the serial ...
Page 16
Philips Semiconductors It is possible to control the phase of the ADC clock (CKADC) through the serial interface with the included digital phase-shift controller. The phase register (5 bits) enables the phase to shift by steps of 11.25 . The ...
Page 17
Philips Semiconductors C-bus and 3W-bus interfaces 9.1 Register definitions The configuration of the registers is given in 2 Table 4: I C-bus and 3W-bus registers Function Subaddress name MSB ...
Page 18
Philips Semiconductors Table 5: Programmed code ... 127 ... 254 255 256 ... 287 The default programmed value is: • Programmed code = 127 • Clamp code = 0 • ADC output = 0. 9.1.3 Coarse and ...
Page 19
Philips Semiconductors To modulate this gain, the fine register is programmed using the above equation. With a full-scale ADC input, the fine register resolution is a Table 7 Table 7: N FINE 0 31 The default programmed value is: N ...
Page 20
Philips Semiconductors Table Bits ‘Vco1’ and ‘Vco0’ control the VCO gain. Table 10: VCO gain control Vco1 The default programmed value is as follows: • Internal ...
Page 21
Philips Semiconductors Table 11: Phase registers bits ... 1 1 The default programmed value is as follows: • No external clock: bit ‘Ckext’ is logic 0 • Phase shift for CKDATA is 0 degrees. 9.1.8 DEMUX register ...
Page 22
Philips Semiconductors Table 13: Address sequence for mode START condition acknowledge bit (generated by the device) and P = STOP condition ADDRESS A SUBADDRESS REGISTER1 Table 14: Address sequence for mode 1 S ...
Page 23
Philips Semiconductors Table 15: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol i(RGB stg T amb T j 11. Thermal characteristics Table 16: Typical thermal characteristics Symbol R th(j-a) ...
Page 24
Philips Semiconductors Table 17: Characteristics …continued 5.25 V (referenced to AGND); V CCA (referenced 4. 5.25 V (referenced to OGND); AGND, DGND, OGND and V SSD CCO T ...
Page 25
Philips Semiconductors Table 17: Characteristics …continued 5.25 V (referenced to AGND); V CCA (referenced 4. 5.25 V (referenced to OGND); AGND, DGND, OGND and V SSD CCO T ...
Page 26
Philips Semiconductors Table 17: Characteristics …continued 5.25 V (referenced to AGND); V CCA (referenced 4. 5.25 V (referenced to OGND); AGND, DGND, OGND and V SSD CCO T ...
Page 27
Philips Semiconductors Table 17: Characteristics …continued 5.25 V (referenced to AGND); V CCA (referenced 4. 5.25 V (referenced to OGND); AGND, DGND, OGND and V SSD CCO T ...
Page 28
Philips Semiconductors Table 18: Examples of PLL settings and performance CCA DDD CCD CCO Video standards f ref (kHz) VGA: 640 480 31.469 25.175 800 VESA: 800 600 48.08 ...
Page 29
Philips Semiconductors RGBIN CKADC CKDATA OUT A OUT B Fig 12. Timing diagram; dual port mode, interleaved outputs, even pixels on port A; Dmx = 1, Shift = 1, Odda = 0, Ckdd = 0, Ckdp = ...
Page 30
Philips Semiconductors RGBIN CKADC CKDATA OUT A OUT B Fig 14. Timing diagram; dual port mode, synchronized outputs, even pixels on port A; Dmx = 1, Shift = 0, Odda = 0, Ckdd = 0, Ckdp = ...
Page 31
... For interfacing the 5 V digital outputs of TDA8757 to devices with 3 V compliant inputs, a resistor bridge (220 820 to ground) should be applied to each digital output. Fig 16. Application diagram. 9397 750 09457 Preliminary data 150 pF TDA8757HL Rev. 07 — 28 February 2002 ...
Page 32
Philips Semiconductors 14. Package outline HLQFP144: plastic thermal enhanced low profile quad flat package; 144 leads; body 1.4 mm; exposed die pad 108 109 E h pin 1 index 144 ...
Page 33
Philips Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe desirable to take normal precautions appropriate to handling integrated circuits. 16. Soldering 16.1 Introduction to soldering surface ...
Page 34
Philips Semiconductors The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed angle to the transport direction of the printed-circuit board. The footprint must ...
Page 35
Philips Semiconductors 17. Revision history Table 20: Revision history Rev Date CPCN Description 07 20020228 - Preliminary data (9397 750 09457); seventh version 9397 750 09457 Preliminary data Rev. 07 — 28 February 2002 TDA8757 Triple 8-bit ADC 170 Msps ...
Page 36
Philips Semiconductors 18. Data sheet status [1] [2] Data sheet status Product status Objective data Development Preliminary data Qualification Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product ...
Page 37
Philips Semiconductors Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 2 2 Features . . . . . . . . . ...