tda8755t NXP Semiconductors, tda8755t Datasheet - Page 4

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tda8755t

Manufacturer Part Number
tda8755t
Description
Yuv 8-bit Video Low-power Analog-to-digital Interface
Manufacturer
NXP Semiconductors
Datasheet

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PINNING
1995 Mar 09
n.c.
REG1
INY
REG2
CLPY
V
INU
SDN
INV
AGND
CLPU
CLPV
REG3
CE
CLP
HREF
CLK
DGND
D'0
D'1
D'2
D'3
V
D0
D1
D2
D3
D4
D5
D6
D7
V
SYMBOL
CCA
CCO
CCD
YUV 8-bit video low-power
analog-to-digital interface
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
not connected
decoupling input (internal
stabilization loop decoupling)
Y analog voltage input
decoupling input (internal
stabilization loop decoupling)
Y clamp capacitor connection
analog positive supply voltage
(+5 V)
U analog voltage input
stabilizer decoupling node and
analog reference voltage (+3.35 V)
V analog voltage input
analog ground
U clamp capacitor connection
V clamp capacitor connection
decoupling input (internal
stabilization loop decoupling)
chip enable input (TTL level input
active LOW)
clamp control input
horizontal reference signal
clock input
digital ground
V data output; bit 0 (n 1)
V data output; bit 1 (n)
U data output; bit 0 (n 1)
U data output; bit 1 (n)
positive supply voltage for output
stages (+5 V)
Y data output; bit 0 (LSB)
Y data output; bit 1
Y data output; bit 2
Y data output; bit 3
Y data output; bit 4
Y data output; bit 5
Y data output; bit 6
Y data output; bit 7 (MSB)
digital positive supply voltage (+5 V)
DESCRIPTION
4
handbook, halfpage
AGND
V CCA
REG1
REG2
CLPY
CLPU
CLPV
REG3
HREF
SDN
CLP
INY
INU
INV
n.c.
CE
Fig.2 Pin configuration.
10
12
13
14
15
16
11
1
2
3
4
5
6
9
7
8
TDA8755
MLA728 - 1
19
32
31
30
29
28
27
26
25
24
23
22
20
18
17
21
Product specification
V CCD
D7
D6
D5
D4
D3
D2
D1
D0
V CCO
D'3
D'2
D'1
D'0
DGND
CLK
TDA8755

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