tda8954th NXP Semiconductors, tda8954th Datasheet
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TDA8954 2 × 210 W class-D power amplifier Rev. 01 — 24 December 2009 1. General description The TDA8954 is a stereo or mono high-efficiency Class D audio power amplifier in a single IC featuring low power dissipation ...
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... Table 2. Ordering information Type number Package Name Description TDA8954J DBS23P plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1 TDA8954TH HSOP24 plastic, heatsink small outline package; 24 leads; low stand-off height TDA8954_1 Product data sheet Conditions Operating mode Operating mode − V Standby, Mute modes; V ...
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... Rev. 01 — 24 December 2009 TDA8954 2 × 210 W class-D power amplifier VDDP2 VDDP1 23 (16) 14 (8) 15 (9) BOOT1 DRIVER HIGH 16 (10) OUT1 DRIVER LOW V SSP1 TDA8954TH (TDA8954J) V DDP2 22 (15) BOOT2 DRIVER HIGH 21 (14) OUT2 DRIVER LOW 17 (11) 20 (13) VSSP1 VSSP2 010aaa556 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning VSSA 24 VDDP2 23 22 BOOT2 21 OUT2 VSSP2 20 n.c. 19 TDA8954TH STABI 18 VSSP1 17 16 OUT1 15 BOOT1 VDDP1 14 PROT 13 Fig 2. Pin configuration TDA8954TH TDA8954_1 Product data sheet 1 VSSA 2 SGND 3 VDDA 4 IN2M 5 IN2P 6 MODE 7 OSC 8 IN1P 9 IN1M 10 DIAG1 11 OSCREF 12 DIAG2 010aaa557 Fig 3. ...
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... PWM signal switching between the main supply lines. A second-order low-pass filter converts the PWM signal to an analog audio signal that can be used to drive a loudspeaker. TDA8954_1 Product data sheet Pin description Pin Description TDA8954TH TDA8954J 1 18 negative analog supply voltage 2 19 signal ground 3 ...
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... NXP Semiconductors The TDA8954 single-chip Class D amplifier contains high-power switches, drivers, timing and handshaking between the power switches, along with some control logic. To ensure maximum system robustness, an advanced protection strategy has been implemented to provide overvoltage, overtemperature and overcurrent protection. Each of the two audio channels contains a PWM modulator, an analog feedback loop and a differential input stage ...
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... NXP Semiconductors The smooth transition between Mute and Operating modes causes a gradual increase in the DC offset output voltage, which becomes inaudible (no pop noise because the DC offset voltage rises smoothly). An overview of the start-up timing is provided in For proper switch-off, the MODE pin should be forced LOW at least 100 ms before the supply lines (V 2.2 V < ...
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... NXP Semiconductors 8.2 Diagnostics The TDA8954 provides two diagnostic signals on pins DIAG1 and DIAG2. Both are open-drain outputs that can be pulled up via a resistor (10 kΩ recommended maximum relative to the GND pin. The maximum input current on these pins is 1 mA. Pin DIAG1 provides a TFB warning signal. Pin DIAG2 can be used to monitor the OCP status and the protection status (whether one of the protection circuits has switched off the amplifier) ...
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... NXP Semiconductors 8.4 Protection The following protection circuits are incorporated into the TDA8954: • Thermal protection: – Thermal FoldBack (TFB) – OverTemperature Protection (OTP) • OverCurrent Protection (OCP) • Window Protection (WP) • Supply voltage protection: – UnderVoltage Protection (UVP) – OverVoltage Protection (OVP) – ...
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... NXP Semiconductors Fig 7. TFB and TFB warning Thermal foldback is active when: T act(th_fold) The value of T details. The gain will be reduced by at least 6 dB (to T reaches T TFB can be disabled by applying the appropriate voltage on pin MODE (see which case the dissipation will not be limited by TFB. The junction temperature may then ...
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... NXP Semiconductors (1) Duty cycle of PWM output modulated according to the audio input signal. (2) Duty cycle of PWM output reduced due to TFB. (3) Amplifier is switched off due to OTP. Fig 8. Behavior of TFB, OTP and signal on pin DIAG1 8.4.2 OverCurrent Protection (OCP) In order to guarantee the robustness of the TDA8954, the maximum output current delivered at the output stages is limited ...
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... NXP Semiconductors When OCP is activated, the active power transistor is turned off and the other power transistor is turned on to reduce the current (C operation is resumed at the next switching cycle (C discharge each time OCP is activated during a switching cycle. If the fault condition that caused OCP to be activated persists long enough to fully discharge C will switch off completely and a restart sequence will be initiated ...
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... NXP Semiconductors Fig 9. Current limiting 8.4.3 Window Protection (WP) Window Protection (WP) checks the conditions at the output terminals of the power stage and is activated: • During the start-up sequence, when the TDA8954 is switching from Standby to Mute. Start-up will be interrupted if a short-circuit is detected between one of the output terminals and one of the supply pins ...
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... NXP Semiconductors 8.4.5 Clock protection (CP) The clock signal can be provided by an external oscillator connected to pin OSC (see Section 14.4). When this signal is lost, or the clock frequency is too low, the amplifier will be switched off and will remain off until the clock signal has been restored. ...
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... NXP Semiconductors Fig 10. TDA8954_1 Product data sheet IN1P IN1M V in IN2P IN2M Input configuration for mono BTL application Rev. 01 — 24 December 2009 TDA8954 2 × 210 W class-D power amplifier OUT1 SGND OUT2 power stage mbl466 © NXP B.V. 2009. All rights reserved ...
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... NXP Semiconductors 9. Internal circuitry Table 6. Internal circuitry Pin Symbol TDA8954TH TDA8954J 7 1 OSC 11 5 OSCREF 10 4 DIAG1 12 6 DIAG2 13 7 PROT TDA8954_1 Product data sheet [1] Equivalent circuit ( (5) 10 (7) Rev. 01 — 24 December 2009 TDA8954 2 × 210 W class-D power amplifier 150 μ ...
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... NXP Semiconductors Table 6. Internal circuitry …continued Pin Symbol TDA8954TH TDA8954J 4 21 IN2M 5 22 IN2P 8 2 IN1P 9 3 IN1M 6 23 MODE 1 18 VSSA 2 19 SGND 3 20 VDDA 14 8 VDDP1 15 9 BOOT1 16 10 OUT1 17 11 VSSP1 18 12 STABI 20 13 VSSP2 21 14 OUT2 22 15 ...
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... NXP Semiconductors 10. Limiting values Table 7. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter ΔV voltage difference I repetitive peak output current ORM T storage temperature stg T ambient temperature amb T junction temperature j V voltage on pin OSC OSC V pull-up voltage ...
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... NXP Semiconductors Table 9. Static characteristics …continued − 335 kHz osc Symbol Parameter I total positive supply current DD(tot) I total negative supply current SS(tot) I standby current stb Mode select input; pin MODE V voltage on pin MODE MODE I input current I Audio inputs; pins IN1M, IN1P, IN2P and IN2M ...
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... NXP Semiconductors [6] DC output offset voltage is gradually applied to the output during the transition between Mute and Operating modes. The slope caused by any DC output offset is determined by the time-constant of the RC network on pin MODE. Fig 11. 13. Dynamic characteristics 13.1 Switching characteristics Table 10. Dynamic characteristics − ...
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... NXP Semiconductors 13.2 Stereo SE configuration characteristics Table 11. Dynamic characteristics − Ω Symbol Parameter P output power o THD total harmonic distortion G closed-loop voltage gain v(cl) SVRR supply voltage ripple rejection Z input impedance i V output noise voltage n(o) α channel separation cs |Δ ...
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... NXP Semiconductors 13.3 Mono BTL application characteristics Table 12. Dynamic characteristics − Ω Symbol Parameter P output power o THD total harmonic distortion G closed-loop voltage gain v(cl) SVRR supply voltage ripple rejection Z input impedance i V output noise voltage n(o) α mute attenuation ...
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... NXP Semiconductors 14. Application information 14.1 Mono BTL application When using the power amplifier in a mono BTL application, the inputs of the two channels must be connected in anti-parallel and the phase of one of the inputs must be inverted; see Figure two single-ended demodulation filters. 14.2 Pin MODE To ensure a pop noise-free start-up time-constant must be applied to pin MODE. ...
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... NXP Semiconductors 14.3.2 Bridge-Tied Load (BTL) Maximum output power 0.5% Maximum output current internally limited peak Where: • P o(0.5 %) • load impedance L • R DSon(hs) • R DSon(ls) • series impedance of the filter coil s(L) • minimum pulse width (typical 150 ns, temperature dependent) w(min) • ...
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... NXP Semiconductors – Power dissipation (P) is determined by the efficiency of the TDA8954. (1) R (2) R (3) R (4) R (5) R Fig 12. Derating curves for power dissipation as a function of maximum ambient temperature In the following example, a heatsink calculation is made for an 4 Ω SE application with a ±30 V supply: The audio signal has a crest factor of 10 (the ratio between peak power and average power (20 dB) ...
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... NXP Semiconductors (thermal resistance from heatsink to ambient) = 10.3 − (0 8.4 K/W R th(h-a) The derating curves for power dissipation (for several R Figure 12. A maximum junction temperature T maximum allowable power dissipation for a given heatsink size can be derived, or the required heatsink size can be determined required power dissipation level; see Figure 12 ...
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R VDDA Ω VDDP3 470 μ SGND 22 μF C VSSP3 470 μ VSSA ...
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... NXP Semiconductors 14.8 Curves measured in reference design (demo board TDA8954J) 10 THD+N (%) −1 10 − (1) f (2) f (3) f Fig 14. THD + function of output power, SE configuration with 2 × 4 Ω load 10 THD+N (%) −1 10 − (1) f (2) f (3) f Fig 15. THD + function of output power, SE configuration with 2 × 3 Ω load ...
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... NXP Semiconductors 10 THD+N (%) −1 10 − (1) f (2) f (3) f Fig 16. THD + function of output power, BTL configuration with 1 × 8 Ω load THD+N (%) −1 10 − (1) P (2) P (3) P Fig 17. THD + function of frequency, SE configuration with 2 × 4 Ω load TDA8954_1 Product data sheet ...
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... NXP Semiconductors THD+N (%) −1 10 − (1) P (2) P (3) P Fig 18. THD + function of frequency, SE configuration with 2 × 3 Ω load THD+N (%) −1 10 − (1) P (2) P (3) P Fig 19. THD + function of frequency, BTL configuration with 1 × 8 Ω load TDA8954_1 Product data sheet ...
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... NXP Semiconductors Chan sep (dB) −20 −40 −60 −80 −100 V Channel B S/N (dB). Fig 20. Channel separation as a function of frequency, SE configuration with 2 × 4 Ω load Chan sep (dB) −20 −40 −60 −80 −100 V Channel B S/N (dB). Fig 21. Channel separation as a function of frequency, SE configuration with 2 × 3 Ω load ...
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... NXP Semiconductors ( (1) 2 × 3 Ω SE configuration; V (2) 2 × 4 Ω SE configuration; V (3) 2 × 6 Ω SE configuration; V Fig 22. Power dissipation as a function of output power per channel, SE configuration 100 Efficiency (%) (1) 2 × 6 Ω SE configuration; V (2) 2 × 4 Ω SE configuration; V (3) 2 × 3 Ω SE configuration; V Fig 23 ...
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... NXP Semiconductors 250 Po (W) 200 150 100 50 Infinite heat sink used. f (1) THD + × 3 Ω. (2) THD + × 4 Ω (1) THD + × 3 Ω (2) THD + × 4 Ω. Fig 24. Output power as a function of supply voltage, SE configuration 500 Po (W) 400 300 200 100 Infinite heat sink used ...
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... NXP Semiconductors 40 Gain (dB (1) 1 × 8 Ω configuration; L (2) 2 × 4 Ω configuration; L (3) 2 × 3 Ω configuration; L Fig 26. Frequency response SVRR (dB) −20 −40 −60 −80 −100 Ripple on VDD, short on input pins. V (1) Operating mode. (2) Mute mode. Fig 27. SVRR as a function of ripple frequency, ripple on V ...
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... NXP Semiconductors SVRR (dB) −20 −40 −60 −80 −100 Ripple on VSS, short on input pins. V (1) Mute mode. (2) Operating mode. Fig 28. SVRR as a function of ripple frequency, ripple Out (V) −1 10 −2 10 −3 10 −4 10 − (1) Mode voltage down. (2) Mode voltage up. Fig 29. Output voltage as a function of mode voltage ...
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... NXP Semiconductors Mute Suppression (dB) −20 −40 −60 −80 −100 V 2 × 3 Ω SE configuration; channel A suppression (dB) Fig 30. Mute attenuation as a function of frequency Mute Suppression (dB) −20 −40 −60 −80 −100 V 2 × 4 Ω SE configuration; channel A suppression (dB) Fig 31. Mute attenuation as a function of frequency TDA8954_1 ...
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... NXP Semiconductors 300 Po (W) 200 100 V Heat sink: Fisher SK495/50; Sil-Pad: 1500ST. Condition: 30 minutes pre-heated in Mute (1) Maximum output power; TFB on. (2) Maximum output power / 8; TFB on. (3) Maximum output power; TFB off. (4) Maximum output power / 8; TFB off. Fig 32. Output power as a function of time, 2 × 3 Ω ...
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... NXP Semiconductors 15. Package outline DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm DIMENSIONS (mm are the original dimensions) (1) UNIT 4.6 1.15 1.65 0.75 0.55 30.4 28.0 mm 4.3 0.85 1.35 0.60 0.35 29.9 27.5 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE ...
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... NXP Semiconductors HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height pin 1 index DIMENSIONS (mm are the original dimensions UNIT max. +0.08 0.53 0.32 3.5 mm 3.5 0.35 −0.04 0.40 0.23 3.2 Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 16. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 16.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 16.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors temperature MSL: Moisture Sensitivity Level Fig 36. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 17. Soldering of through-hole mount packages 17.1 Introduction to soldering through-hole mount packages This text gives a very brief insight into wave, dip and manual soldering. ...
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... NXP Semiconductors 17.4 Package related soldering information Table 15. Package CPGA, HCPGA DBS, DIP, HDIP, RDBS, SDIP, SIL [2] PMFP [1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. [2] For PMFP packages hot bar soldering or manual soldering is suitable. TDA8954_1 ...
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... NXP Semiconductors 18. Revision history Table 16. Revision history Document ID Release date TDA8954_1 20091224 TDA8954_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 24 December 2009 TDA8954 2 × 210 W class-D power amplifier Supersedes - © NXP B.V. 2009. All rights reserved. ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.3 Pulse-width modulation frequency . . . . . . . . . . 8 8.4 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.4.1 Thermal protection . . . . . . . . . . . . . . . . . . . . . . 9 8.4.1.1 Thermal FoldBack (TFB 8.4.1.2 OverTemperature Protection (OTP ...