tda8376ah NXP Semiconductors, tda8376ah Datasheet - Page 22

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tda8376ah

Manufacturer Part Number
tda8376ah
Description
I2c-bus Controlled Pal/ntsc Tv Processors
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
1996 Jan 26
F
V
V
V
Z
S
V
t
V
I
I
t
Vertical synchronization and geometry correction
V
f
f
LR
V
V
I
I
VS
V
V
I
I
V
W
39(min)
39(max)
d
fr
lock
dis
charge
diff(p-p)
CM
LYBACK PULSE INPUT
i
I
SYMBOL
HSW
41(max)
ANDCASTLE PULSE OUTPUT
39
clamp
ERTICAL OSCILLATOR
ERTICAL RAMP GENERATOR
50(p-p)
50L
ERTICAL DRIVE OUTPUTS
o
I
50
2(SW)
2
C-bus controlled PAL/NTSC TV processors
switching voltage level for horizontal
blanking
switching level for phase-2 loop
maximum input voltage
input impedance
output voltage
pulse width
clamping voltage level for vertical
guard detection
minimum input current to activate
guard detection
maximum allowable input current
delay of start of burst key to start of
sync
free running frequency
locking frequency range
divider value not locked
locking range
sawtooth voltage amplitude
(peak-to-peak value)
discharge current
charge current set by external
resistor
vertical slope control range
charge current increase
LOW level voltage of ramp
differential output current
(peak-to-peak value)
common mode output current
output voltage
; note 15
(
PIN
(
PARAMETER
41)
PINS
(
(
PIN
PIN
47
50)
39)
AND
48)
note 7
note 7
during burst key
during blanking
burst key pulse
vertical blanking (50 Hz)
vertical blanking (60 Hz)
VS = 1FH;
C = 100 nF; R = 39 k
note 16
63 steps
f = 60 Hz
VA = 1FH
22
CONDITIONS
4.8
1.8
3.3
2.5
45
488
0
TDA8376; TDA8376A
MIN.
20
0.4
4.0
8.0
10
5.3
2.0
3.5
25
21
2.7
5.4
50/60
625/525
3.5
1
19
20
2.07
0.95
400
TYP.
Objective specification
5.8
2.2
3.7
0.5
64.5
722
+20
4.0
MAX.
V
V
V
M
V
V
lines
lines
V
mA
mA
Hz
Hz
lines
lines/
frame
V
mA
%
%
V
mA
V
UNIT
s
s
A
A

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