tda8822 NXP Semiconductors, tda8822 Datasheet - Page 9
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tda8822
Manufacturer Part Number
tda8822
Description
Universal I2c-bus Programmable Rf Modulator
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8822.pdf
(28 pages)
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Philips Semiconductors
The TPSG bit is used to switch on or off the TPSG using
the I
application, connecting the pin TPSG to DGND. This
pin TPSG has a double function and acts as an input or as
an output.
These are the two functions:
Notice that if the TPSG bit is set to logic 1 while the RF0
bit is set to logic 0, the TPSG is turned off, and the sound
oscillator is off (see Table 8).
N13 to N0 are the 14 bits to set the video programmable
divider ratio and then to set the picture carrier frequency
following the formula: f
Table 5 Contents of programming words
1997 Jan 08
where:
Address byte CA
F1: frequency
byte 1
F0: frequency
byte 0
C1: control byte 1
C0: control byte 0
T0 is set to logic 1, RF0 is set to logic 1, TPSG is set to
logic 1 and P0 is set to logic 0 to select the video high
impedance test mode because it is in this mode that the
RF oscillator starts in the best conditions.
Output: if the TPSG is set using the I
pin TPSG is used as an output open collector NPN port.
This port can be used to indicate with an LED that the
TPSG is on. This is especially useful in systems using
an on-screen display. If the TV set is not tuned to the
right channel there is an alternate indication that the
TPSG is on (see Fig.9).
Input: if the TPSG is set with an hardware switch in the
application, the TPSG pin is used as one of the inputs to
select the TPSG mode (see Fig.8).
f
reference divider ratio. For example, with a 4 MHz
crystal connected to
pin XTAL, f
Universal I
modulator
ref(video)
2
C-bus. It is also possible to switch the TPSG on in the
BYTE
is the frequency on pin XTAL divided by the
ref video
2
C-bus programmable RF
osc
=
BIT 7
MSB
MD2
N7
4 000 000
----------------------- -
1
0
1
= f
512
ref(video)
TPSG
DEV2
BIT 6
MD1
N6
1
=
7812.5 Hz
8
2
C-bus, the
DEV1
BIT 5
N,
MD0
N13
N5
0
DEV0
BIT 4
SC1
N12
N4
0
9
BIT 3
PS2
SC0
N11
DEV2, DEV1 and DEV0 are the bits to set the sound
subcarrier frequency deviation (see Table 3).
PS2, PS1 and PS0 are the bits to set the picture-to-sound
ratio (see Table 4).
MD2, MD1 and MD0 are the bits to set the modulation
depth (see Table 1).
SC1 and SC0 are the bits to set the sound subcarrier
frequency according to Table 2.
RF0 is a bit that controls the RF oscillator on/off. In normal
mode, it should be set to logic 1. If the modulator is not
used and may create some interferences with other
signals in the application, it should be set to logic 0
(see Table 6).
Notice that if the bit RF0 is logic 0 while the bit TPSG is
logic 1, then the RF oscillator is still running, but the sound
oscillator is off, and the TPSG is also off (see Table 8).
The bit P0 controls the output port P0, which is an open
collector NPN port, able to drive up to 10 mA
(see Table 7).
T0 is a bit used for test purposes. If this bit is set to logic 0,
the IC operates in normal configuration. If it is set to
logic 1, then the use of bits TPSG, RF0 and P0 is changed
to select 1 of the 8 test modes as explained in Table 9.
N3
1
N is the programmable divider ratio:
N = N
f
osc
is the RF oscillator frequency.
BIT 2
13
N10
PS1
RF0
N2
0
2
13
+ N
BIT 1
PS0
N9
N1
P0
1
12
2
12
BIT 0
LSB
N8
N0
T0
+ ... + N
0
0
Preliminary specification
ACKNOWLEDGE BIT
1
2 + N
TDA8822
ACK
ACK
ACK
ACK
ACK
0