uda1330ats NXP Semiconductors, uda1330ats Datasheet
uda1330ats
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uda1330ats Summary of contents
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... DATA SHEET UDA1330ATS Low-cost stereo filter DAC Product specification Supersedes data of 2000 April 18 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 2001 Feb 02 ...
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... MSB-justified data format with word lengths bits and the LSB-justified serial data format with word lengths of 16, 18 and 20 bits. The UDA1330ATS can be used in two modes: L3 mode or the static pin mode. In the L3 mode, all digital sound processing features must be controlled via the L3 interface, including the selection of the system clock setting ...
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... V = 5.0 V) DDA DDD note dB; A-weighted code = 0; A-weighted = V = 3.3 V) DDA DDD note dB; A-weighted code = 0; A-weighted playback mode DDA DDA 3 Product specification UDA1330ATS MIN. TYP. 2.7 5.0 2.7 5.0 9.5 400 7.0 250 5.5 3 100 100 1 100 100 = 5 DDD = 3 ...
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... APPSEL 11 APPL0 10 CONTROL APPL1 INTERFACE 9 APPL2 8 APPL3 DAC 16 VOUTR 12 MGL401 V ref(DAC) BCK DATAI DDD 4 13 UDA1330ATS V SSD 5 12 SYSCLK 6 11 APPSEL 7 10 APPL3 8 MGL402 Fig.2 Pin configuration. Product specification VOUTR V SSA VOUTL V DDA V ref(DAC) APPL0 APPL1 9 APPL2 ...
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... Important: the WS edge MUST fall on the negative edge of the BCK at all times for proper operation of the digital interface The UDA1330ATS also accepts double speed data for s double speed data monitoring purposes L3 MODE This mode supports the following input formats: ...
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... The output voltage of the FSDAC scales linearly with the power supply voltage shifts s Pin compatibility In the L3 mode the UDA1330ATS can be used on boards that are designed for the UDA1320ATS. Remark: It should be noted that the UDA1330ATS is designed for 5 V operation while the UDA1320ATS is designed for 3 V operation. This means that the ...
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Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATA MSB B2 MSB 2 ...
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... L3 interface and to define the destination registers for the data transfer mode. Data bits represent a 6-bit device address where bit 7 is the MSB. The address of the UDA1330ATS is 000101 (bit 7 to bit 2). If the UDA1330ATS receives a different address, it will deselect its microcontroller interface logic ...
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... L3DATA t stp(L3) handbook, full pagewidth L3MODE t su(L3)D L3CLOCK L3DATA WRITE 2001 Feb 02 t CLK(L3)L t CLK(L3)H t su(L3)A t su(L3)DA t h(L3)DA BIT 0 Fig.4 Timing address mode. t CLK(L3)L T cy(CLK)L3 t CLK(L3)H t h(L3)DA t su(L3)DA BIT 0 Fig.5 Timing data transfer mode. 9 Product specification UDA1330ATS t su(L3)A t h(L3)A T cy(CLK)(L3) BIT 7 MGL723 t stp(L3) t h(L3)D BIT 7 MGL882 ...
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... DE0 Product specification UDA1330ATS data byte #2 address MGL725 REGISTER SELECTED SC = system clock frequency (2 bits); see Table data input format (3 bits); see Table 9 not used REGISTER SELECTED VC = volume control (6 bits); see Table 11 not used DE = de-emphasis (2 bits); see Table mute (1 bit) ...
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... FORMAT UTE Mute is a 1-bit value to enable the digital mute. Table 12 Mute setting Product specification UDA1330ATS dB in steps of 1 dB. VC4 VC3 VC2 VC1 VC0 VOLUME (dB ...
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... In accordance with “SNW-FQ-611-E” . 2001 Feb 02 CONDITIONS note 1 note 1 note 2 note 3 note 4 output short-circuited to V output short-circuited DAC operation after short-circuiting cannot be warranted. DDA CONDITIONS in free air 12 Product specification UDA1330ATS MIN. MAX. UNIT 6.0 V 6.0 V 150 C 65 +125 C 40 +85 C ...
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... V DDD V = 3.3 V DDD playback mode 5.0 V DDA DDD 3.3 V DDA DDD V = 5.0 V 2.2 DDD V = 3.3 V 1.45 DDD V = 5.0 V DDD V = 3.3 V DDD 0.9V 0.4V 13 Product specification UDA1330ATS and V ); unless SSA SSD MIN. TYP. MAX. 5.0 5.5 5.0 5.5 9.5 400 7.0 250 5.5 3 0.8 0 0.5 V DDD DDD 0.6V DDD DDD 0.5 +0.1V DDD UNIT ...
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... A-weighted code = 0; A-weighted = V = 3.3 V) DDA DDD dB; A-weighted code = 0; A-weighted kHz; ripple V = 100 mV (p-p) ripple 14 Product specification UDA1330ATS MIN. TYP. MAX. 0.45V 0.5V 0.55V DDA DDA DDA 0.36 0.15 2 must be used to prevent and V ); unless otherwise specified. ...
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... V L CONDITIONS f = 256f sys f = 384f sys f = 512f sys f < 19.2 MHz sys f sys f < 19.2 MHz sys f sys 15 Product specification UDA1330ATS MIN. TYP 0.3T sys 19.2 MHz 0.4T sys 0.3T sys 19.2 MHz 0.4T sys 300 100 100 ...
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... Low-cost stereo filter DAC t CWH handbook, full pagewidth handbook, full pagewidth WS t BCKH t r BCK T cy(BCK) DATAI 2001 Feb 02 t CWL T sys Fig.7 System clock timing. t h(WS) t su(WS BCKL Fig.8 Serial interface timing. 16 Product specification UDA1330ATS MGR984 t su(DATAI) t h(DATAI) MGL880 ...
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... C6 100 nF 100 nF ( SSA V DDA V SSD V DDD UDA1330ATS Fig.9 Application diagram. 17 Product specification UDA1330ATS VOUTL 14 100 ( VOUTR 16 100 ( ref(DAC 100 ...
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... VERSION IEC SOT369-1 2001 Feb 2.5 scale (1) ( 0.32 0.25 5.30 4.5 6.6 0.65 0.20 0.13 5.10 4.3 6.2 REFERENCES JEDEC EIAJ MO-152 18 UDA1330ATS detail 0.75 0.65 1.0 0.2 0.13 0.45 0.45 EUROPEAN PROJECTION Product specification SOT369 ( 0. ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 19 Product specification UDA1330ATS ...
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... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2001 Feb 02 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 20 Product specification UDA1330ATS (1) REFLOW suitable suitable suitable suitable suitable ...
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... Product specification UDA1330ATS (1) These products are not Philips Semiconductors ...
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... Philips Semiconductors Low-cost stereo filter DAC 2001 Feb 02 NOTES 22 Product specification UDA1330ATS ...
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... Philips Semiconductors Low-cost stereo filter DAC 2001 Feb 02 NOTES 23 Product specification UDA1330ATS ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...