pca9545ad NXP Semiconductors, pca9545ad Datasheet - Page 8

• Manufacturer Part Number: pca9545ad
• Description: 4-channel I2c Switch With Interrupt Logic And Reset
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9545A_45B_45C_6
Product data sheet
6.2.2 Interrupt handling
6.3 RESET input
The PCA9545A/45B/45C provides 4 interrupt inputs, one for each channel, and one
open-drain interrupt output. When an interrupt is generated by any device, it will be
detected by the PCA9545A/45B/45C and the interrupt output will be driven LOW. The
channel does not need to be active for detection of the interrupt. A bit is also set in the
control register.
Bit 4 through bit 7 of the control register corresponds to channel 0 through channel 3 of
the PCA9545A/45B/45C, respectively. Therefore, if an interrupt is generated by any
device connected to channel 1, the state of the interrupt inputs is loaded into the control
register when a read is accomplished. Likewise, an interrupt on any device connected to
channel 0 would cause bit 4 of the control register to be set on the read. The master can
then address the PCA9545A/45B/45C and read the contents of the control register to
determine which channel contains the device generating the interrupt. The master can
then reconfigure the PCA9545A/45B/45C to select this channel, and locate the device
generating the interrupt and clear it.
It should be noted that more than one device can provide an interrupt on a channel, so it is
up to the master to ensure that all devices on a channel are interrogated for an interrupt.
The interrupt inputs may be used as general purpose inputs if the interrupt function is not
required.
If unused, interrupt input(s) must be connected to V
Table 5.
Remark: Several interrupts can be active at the same time. Example: INT3 = 0, INT2 = 1,
INT1 = 1, INT0 = 0, means that there is no interrupt on channel 0 and channel 3, and
there is interrupt on channel 1 and channel 2.
The RESET input is an active LOW signal which may be used to recover from a bus fault
condition. By asserting this signal LOW for a minimum of t
will reset its registers and I
RESET input must be connected to V
INT3
X
X
X
0
1
INT2
X
X
0
1
X
Control register: Read—interrupt
INT1
X
0
1
X
X
Rev. 06 — 19 March 2007
INT0
0
1
X
X
X
2
C-bus state machine and will deselect all channels. The
4-channel I
B3
X
X
X
X
DD
B2
X
X
X
X
through a pull-up resistor.
2
C-bus switch with interrupt logic and reset
B1
X
X
X
X
PCA9545A/45B/45C
DD
B0
X
X
X
X
through a pull-up resistor.
w(rst)L
Command
no interrupt on channel 0
interrupt on channel 0
no interrupt on channel 1
interrupt on channel 1
no interrupt on channel 2
interrupt on channel 2
no interrupt on channel 3
interrupt on channel 3
, the PCA9545A/45B/45C
© NXP B.V. 2007. All rights reserved.
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