pca9543bpw NXP Semiconductors, pca9543bpw Datasheet - Page 8

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pca9543bpw

Manufacturer Part Number
pca9543bpw
Description
Pca9543a/pca9543b/pca9543c 2-channel I2c-bus Switch With Interrupt Logic And Reset
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
7. Characteristics of the I
PCA9543A_43B_43C_4
Product data sheet
7.1 Bit transfer
7.2 START and STOP conditions
Figure
3.5 V or lower, so the PCA9543A supply voltage could be set to 3.3 V. Pull-up resistors
can then be used to bring the bus voltages to their appropriate levels (see
More Information can be found in Application Note AN262: PCA954X family of I
multiplexers and switches .
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
Fig 9. Bit transfer
Fig 10. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
8, we see that V
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 04 — 20 October 2006
o(sw)(max)
10).
2-channel I
will be at 2.7 V when the PCA9543A supply voltage is
data valid
data line
stable;
Figure
2
C-bus switch with interrupt logic and reset
allowed
change
of data
PCA9543A/43B/43C
9).
STOP condition
mba607
P
© NXP B.V. 2006. All rights reserved.
Figure
mba608
2
C/SMBus
SDA
SCL
15).
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