pca9540dp NXP Semiconductors, pca9540dp Datasheet - Page 4

• Manufacturer Part Number: pca9540dp
• Description: 2-channel I2c Multiplexer
• Manufacturer: NXP Semiconductors

Philips Semiconductors
DEVICE ADDRESSING
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9540 is
shown in Figure 3.
The last bit of the slave address defines the operation to be
performed. When set to logic 1, a read is selected while a logic 0
selects a write operation.
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9540 which will be stored
in the Control Register. If multiple bytes are received by the
PCA9540, it will save the last byte received. This register can be
written and read via the I
CONTROL REGISTER DEFINITION
A SCx/SDx downstream pair, or channel, is selected by the contents
of the control register. This register is written after the PCA9540 has
been addressed. The 2 LSBs of the control byte are used to
determine which channel is to be selected. When a channel is
selected, the channel will become active after a stop condition has
been placed on the I
be in a HIGH state when the channel is made active, so that no
false conditions are generated at the time of connection.
Table 1. Control Register; Write — Channel Selection/
Read — Channel Status
POWER-ON RESET
When power is applied to V
the PCA9540 in a reset state until V
point, the reset condition is released and the PCA9540 registers and
I
causing all the channels to be deselected.
2003 Dec 18
2
D7
C state machine are initialized to their default states, all zeroes
X
X
X
X
2-channel I
D6
X
X
X
X
D5
X
X
X
X
X
1
7
D4
X
X
X
X
1
ENABLE BIT
X
6
2
Figure 4. Control register
Figure 3. Slave address
C bus. This ensures that all SCx/SDx lines will
2
1
D3
X
X
X
X
X
C multiplexer
5
2
C bus.
FIXED
0
DD
X
B2
4
0
1
1
1
, an internal Power On Reset holds
0
3
X
CHANNEL SELECTION BITS
B1
X
0
0
1
0
DD
B2
2
(READ/WRITE)
B0
has reached V
0
X
X
0
1
B1
1
R/W
No channel selected
No channel selected
B0
0
Channel 0 enabled
Channel 1 enabled
COMMAND
POR
SW00713
SW00839
. At this
4
VOLTAGE TRANSLATION
The pass gate transistors of the PCA9540 are constructed such that
the V
be passed from one I
Figure 5 shows the voltage characteristics of the pass gate
transistors (note that the graph was generated using the data
specified in the DC Characteristics section of this datasheet). In
order for the PCA9540 to act as a voltage translator, the V
voltage should be equal to, or lower than the lowest bus voltage. For
example, if the main bus was running at 5 V, and the downstream
buses were 3.3 V and 2.7 V, then V
2.7 V to effectively clamp the downstream bus voltages. Looking at
Figure 5, we see that V
PCA9540 supply voltage is 3.5 V or lower so the PCA9540 supply
voltage could be set to 3.3 V. Pull-up resistors can then be used to
bring the bus voltages to their appropriate levels (see Figure 12).
More Information can be found in Application Note AN262 PCA954X
family of I
V
pass
DD
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
voltage can be used to limit the maximum voltage that will
2.0
2
C/SMBus multiplexers and switches.
2.5
2
Figure 5. V
C bus to another.
TYPICAL
pass
3.0
(max.) will be at 2.7 V when the
V
pass
MAXIMUM
3.5
pass
vs. V
pass
DD
voltage
V
should be equal to or below
4.0
DD
4.5
PCA9540
MINIMUM
Product data
5.0
SW00820
pass
5.5