pca9671 NXP Semiconductors, pca9671 Datasheet - Page 12

• Manufacturer Part Number: pca9671
• Description: Remote 16-bit I/o Expander For Fm+ I2c-bus With Reset
• Manufacturer: NXP Semiconductors

NXP Semiconductors
8. I/O programming
PCA9671_1
Product data sheet
8.1 Quasi-bidirectional I/O architecture
8.2 Writing to the port (Output mode)
The PCA9671’s 16 ports (see
as input or output ports. Input data is transferred from the ports to the microcontroller in
the Read mode (see
(see
Every data transmission from the PCA9671 must consist of an even number of bytes, the
first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third
will be referred to as P07 to P00, and so on.
This quasi-bidirectional I/O can be used as an input or output without the use of a control
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current
source (I
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the
write mode.
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (I
To write, the master (microcontroller) first addresses the slave device. By setting the last
bit of the byte containing the slave address to logic 0 the Write mode is entered. The
PCA9671 acknowledges and the master sends the first data byte for P07 to P00. After the
first data byte is acknowledged by the PCA9671, the second data byte P17 to P10 is sent
by the master. Once again, the PCA9671 acknowledges the receipt of the data. Each 8-bit
data is presented on the port lines after it has been acknowledged by the PCA9671.
The number of data bytes that can be sent successively is not limited. After every two
bytes, the previous data is overwritten.
The first data byte in every pair refers to Port 0 (P07 to P00), whereas the second data
byte in every pair refers to Port 1 (P17 to P10). See
Fig 15. Correlation between bits and ports
Figure
OH
OL
P07
07
) to V
) will flow to V
16).
P06 P05 P04 P03 P02 P01 P00
06
DD
05
is active. An additional strong pull-up to V
Rev. 01 — 20 December 2006
Figure
first byte
04
SS
03
.
17). Output data is transmitted to the ports in the Write mode
Figure
02
Remote 16-bit I/O expander for Fm+ I
01
2) are entirely independent and can be used either
00
A
P17
17
P16 P15 P14 P13 P12 P11 P10
16
Figure
15
second byte
14
15.
13
DD
(I
12
trt(pu)
11
PCA9671
) allows fast rising
© NXP B.V. 2006. All rights reserved.
2
C-bus with reset
002aab634
10
A
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