pca9600 NXP Semiconductors, pca9600 Datasheet - Page 17

• Manufacturer Part Number: pca9600
• Description: Dual Bidirectional Bus Buffer
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9600_2
Product data sheet
Fig 18. I
SDA
SCL
2
C-bus multipoint application
3.3 V to 5 V
3.3 V to 5 V
SX
SY
There is an Excel calculator which makes it easy to determine the maximum I
speed when using the PCA9600. The calculator and instructions can be found at
www.nxp.com/clockspeedcalculator.
PCA9600
The actual LOW period will be 407 + 126 = 533 ns, which exceeds the minimum Fm+
500 ns requirement. This system requires the bus LOW period, and therefore cycle
time, to be increased by 33 ns so the system must run slightly below the 1 MHz limit.
The possible maximum speed has a cycle period of 1033 ns or 968 kHz.
12 V
RX
RY
TX
TY
12 V
12 V
no limit to the number of connected bus devices
Rev. 02 — 13 August 2008
SX
PCA9600
SCL/SDA
SY
SX
PCA9600
SCL/SDA
SY
SX
PCA9600
SCL/SDA
SY
PCA9600
Dual bidirectional bus buffer
3.3 V 3.3 V
twisted-pair telephone wires,
USB, or flat ribbon cables;
up to 15 V logic levels,
include V
CC
PCA9600
© NXP B.V. 2008. All rights reserved.
and GND
SY SDA
SX SCL
2
C-bus clock
001aai065
17 of 25