pca9698 NXP Semiconductors, pca9698 Datasheet - Page 23

• Manufacturer Part Number: pca9698
• Description: 40-bit Fm+ I2c-bus Advanced I/o Port With Reset, Oe And Int
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8. Characteristics of the I
PCA9698_2
Product data sheet
8.1.1 START and STOP conditions
8.1 Bit transfer
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
Fig 11. Bit transfer
Fig 12. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
START condition
2
SDA
SCL
Figure
C-bus
S
40-bit Fm+ I
Rev. 02 — 19 July 2006
12.)
data valid
data line
stable;
2
C-bus advanced I/O port with RESET, OE and INT
Figure
allowed
change
of data
11).
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
STOP condition
mba607
P
PCA9698
mba608
SDA
SCL
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