tda9885ts NXP Semiconductors, tda9885ts Datasheet - Page 15
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tda9885ts
Manufacturer Part Number
tda9885ts
Description
I2c-bus Controlled Single And Multistandard Alignment-free If-pll Demodulators
Manufacturer
NXP Semiconductors
Datasheet
1.TDA9885TS.pdf
(56 pages)
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Philips Semiconductors
9.1.1
The first module address MAD1 is the standard address (see Table 1).
Table 4 Slave addresses; notes 1 and 2
Notes
1. For MAD activation via external resistor: see Table 1 and Fig.23.
2. For applications without I
9.1.2
Table 5 Data read register (status register)
Table 6 Description of status register bits
Note
1. If no IF input is applied, then bit AFCWIN = 1 due to the fact that the VCO is forced to the AFC window border for
2003 Oct 02
MAD1
MAD2
MAD3
MAD4
CARRDET
AFCWIN
I
alignment-free IF-PLL demodulators
AFCWIN
AFC[4:1]
VIFLEV
NAME
2
PONR
fast lock-in behaviour.
MSB
C-bus controlled single and multistandard
BIT
D7
SLAVE ADDRESS
S
D
LAVE ADDRESS
ATA BYTE
VALUE (HEX)
VIFLEV
VALUE
D6
1
0
1
0
1
0
1
0
4B
4A
43
42
AFC window
VCO in 1.6 MHz AFC window; note 1
VCO out of 1.6 MHz AFC window
VIF input level
high level; VIF input voltage 200 V (typically)
low level
FM carrier detection
detection
no detection
Automatic frequency control
see Table 7
Power-on reset
after Power-on reset or after supply breakdown
after a successful reading of the status register
2
CARRDET
C-bus: see Tables 17 and 18.
D5
A6
1
1
1
1
AFC4
D4
A5
0
0
0
0
15
A4
0
0
0
0
AFC3
D3
DESCRIPTION
BIT
A3
0
0
1
1
AFC2
D2
TDA9885; TDA9886
A2
0
0
0
0
AFC1
D1
Product specification
A1
1
1
1
1
PONR
LSB
D0
A0
1
0
1
0