tda9870ah NXP Semiconductors, tda9870ah Datasheet - Page 65

• Manufacturer Part Number: tda9870ah
• Description: Digital Tv Sound Processor Dtvsp
• Manufacturer: NXP Semiconductors

Philips Semiconductors
10.3.31 F
Table 64 Subaddress 36 (note 1)
Note
1. The default setting at power-up is 00000000.
Table 65 System clock frequency selection
Note
1. With 16.384 MHz the duty cycle is 33%.
1999 Dec 20
7 (MSB)
0 (LSB)
Digital TV Sound Processor (DTVSP)
BIT
6
5
4
3
2
1
B4
0
0
1
1
EATURE INTERFACE CONFIGURATION REGISTER
I
SYSOUT
SYSCL1
SYSCL0
2
I
NAME
SFORM
2
SOUT
B7
B6
B5
B3
VALUE
0
1
0
1
0
0
0
1
0
1
0
1
0
default value
default value
default value
system clock frequency selection (see Table 65)
enables the output of a system (or master) clock signal at pin SYSCLK
the output will be off, thereby improving the EMC performance
an MSB-aligned (MSB-first) serial output format is selected, i.e. a level change at
pin WS indicates the beginning of a new audio sample
the standard I
enables the I
select) in a format determined by bit I
master
the outputs mentioned will be 3-stated, thereby improving the EMC performance
SYSCLK OUTPUT
2
S-bus outputs (both serial data outputs plus serial bit clock and word
2
S-bus output format is selected
256f
384f
512f
768f
65
s
s
s
s
DESCRIPTION
2
SFORM; the TDA9870A is then an I
FREQUENCY (MHz)
16.384
12.288
24.576
8.192
Product specification
TDA9870A
(1)
2
S-bus