adv7342 Analog Devices, Inc., adv7342 Datasheet - Page 55

• Manufacturer Part Number: adv7342
• Description: Multiformat Video Encoder Six, 11-bit, 297 Mhz Dacs
• Manufacturer: Analog Devices, Inc.

SD HUE ADJUST CONTROL
Subaddress 0xA0
When enabled, the SD hue adjust control register (Subaddress
0xA0) is used to adjust the hue on the SD composite and chroma
outputs. This feature can be enabled using Subaddress 0x87, Bit 2.
Subaddress 0xA0 contains the bits required to vary the hue of
the video data, that is, the variance in phase of the subcarrier
during active video with respect to the phase of the subcarrier
during the color burst. The ADV7342/ADV7343 provide a
range of ±22.5° in increments of 0.17578125°. For normal
operation (zero adjustment), this register is set to 0x80. Values
0xFF and 0x00 represent the upper and lower limits, respectively,
of the attainable adjustment in NTSC mode. Values 0xFF and
0x01 represent the upper and lower limits, respectively, of the
attainable adjustment in PAL mode.
The hue adjust value is calculated using the following equation:
where HCR
For example, to adjust the hue by +4°, write 0x97 to the hue
adjust control register.
where the sum is rounded to the nearest integer.
To adjust the hue by −4°, write 0x69 to the hue adjust control
register.
where the sum is rounded to the nearest integer.
SD BRIGHTNESS DETECT
Subaddress 0xBA
The ADV7342/ADV7343 allow monitoring of the brightness
level of the incoming video data. The SD brightness detect
register (Subaddress 0xBA) is a read-only register.
SD BRIGHTNESS CONTROL
Subaddress 0xA1, Bits[6:0]
When this feature is enabled, the SD brightness/WSS control
register (Subaddress 0xA1) is used to control brightness by
adding a programmable setup level onto the scaled Y data. This
feature can be enabled using Subaddress 0x87, Bit 3.
Hue Adjust (°) = 0.17578125° ( HCR
⎛
⎜
⎝
⎛
⎜
⎝
. 0
. 0
17578125
17578125
−
d
4
4
is the hue adjust control register (decimal)
⎞
⎟
⎠
⎞
⎟
⎠
+
+
128
128
≈
≈
151
105
100 IRE
d
d
0 IRE
=
=
x 0
x 0
97
9 6
NTSC WITHOUT PEDESTAL
d
VALUE ADDED
− 128)
NO SETUP
Figure 68. Examples of Brightness Control Values
Rev. 0 | Page 55 of 88
POSITIVE SETUP
VALUE ADDED
For NTSC with pedestal, the setup can vary from 0 IRE to 22.5 IRE.
For NTSC without pedestal and for PAL, the setup can vary
from −7.5 IRE to +15 IRE.
The SD brightness control register is an 8-bit register. The seven
LSBs of this 8-bit register are used to control the brightness
level, which can be a positive or negative value.
For example, to add +20 IRE brightness level to an NTSC signal
with pedestal, write 0x28 to Subaddress 0xA1.
To add –7 IRE brightness level to a PAL signal, write 0x72 to
Subaddress 0xA1.
Table 45. Sample Brightness Control Values
Setup Level
22.5 IRE
15 IRE
7.5 IRE
0 IRE
1
SD INPUT STANDARD AUTO DETECTION
Subaddress 0x87, Bit 5
The ADV7342/ADV7343 include an SD input standard auto-
detect feature. This SD feature can be enabled by setting
Subaddress 0x87, Bit 5 to 1.
When enabled, the ADV7342/ADV7343 can automatically
identify an NTSC or PAL B/D/G/H/I input stream. The
ADV7342/ADV7343 automatically update the subcarrier
frequency registers with the appropriate value for the identified
standard. The ADV7342/ADV7343 are also configured to
correctly encode the identified standard.
The SD standard bits (Subaddress 0x80, Bits[1:0]) and the
subcarrier frequency registers are not updated to reflect the
identified standard. All registers retain their default or user-
defined values.
(NTSC) with
Pedestal
Values in the range of 0x3F to 0x44 could result in an invalid output signal.
0 × (SD Brightness Value) =
0 × ( IRE Value × 2.015631) =
0 × (20 × 2.015631) = 0 × (40.31262) ≈ 0x28
0 × ( SD Brightness Value ) =
0 × ( IRE Value × 2.075631) =
0 × (7 × 2.015631) = 0x(14.109417) ≈ 0001110b
0001110b into twos complement = 1110010b = 0x72
NEGATIVE SETUP
VALUE ADDED
Setup Level
15 IRE
7.5 IRE
0 IRE
−7.5 IRE
(NTSC)
Without
Pedestal
+7.5 IRE
–7.5 IRE
ADV7342/ADV7343
Setup
15 IRE
7.5 IRE
0 IRE
−7.5 IRE
Level
(PAL)
1
Brightness
0x1E
0x0F
0x00
0x71
Control
Value