adv7342 Analog Devices, Inc., adv7342 Datasheet - Page 73

• Manufacturer Part Number: adv7342
• Description: Multiformat Video Encoder Six, 11-bit, 297 Mhz Dacs
• Manufacturer: Analog Devices, Inc.

APPENDIX 3—SD CLOSED CAPTIONING
Subaddress 0x91 to Subaddress 0x94
The ADV7342/ADV7343 support closed captioning conforming
to the standard television synchronizing waveform for color
transmission. Closed captioning is transmitted during the
blanked active line time of Line 21 of the odd fields and
Line 284 of the even fields.
Closed captioning consists of a 7-cycle sinusoidal burst that is
frequency- and phase-locked to the caption data. After the clock
run-in signal, the blanking level is held for two data bits and is
followed by the Logic 1 start bit. Sixteen bits of data follow the
start bit. These consist of two 8-bit bytes, seven data bits, and one
odd parity bit. The data for these bytes is stored in the SD closed
captioning registers (Subaddress 0x93 to Subaddress 0x94).
The ADV7342/ADV7343 also support the extended closed
captioning operation, which is active during even fields and
encoded on Scan Line 284. The data for this operation is stored
in the SD closed captioning registers (Subaddress 0x91 to
Subaddress 0x92).
The ADV7342/ADV7343 automatically generate all clock run-
in signals and timing that support closed captioning on Line 21
50 IRE
40 IRE
FREQUENCY = F
REFERENCE COLOR BURST
AMPLITUDE = 40 IRE
10.5 ± 0.25µs
10.003µs
(9 CYCLES)
SC
Figure 99. SD Closed Captioning Waveform, NTSC
= 3.579545MHz
27.382µs
Rev. 0 | Page 73 of 88
CLOCK RUN-IN
7 CYCLES OF
0.5035MHz
12.91µs
and Line 284. All pixels inputs are ignored on Line 21 and Line
284 if closed captioning is enabled.
The FCC Code of Federal Regulations (CFR) 47 Section 15.119
and EIA608 describe the closed captioning information for
Line 21 and Line 284.
The ADV7342/ADV7343 use a single buffering method. This
means that the closed captioning buffer is only 1-byte deep.
Therefore, there is no frame delay in outputting the closed
captioning data, unlike other 2-byte deep buffering systems.
The data must be loaded one line before it is output on Line 21
and Line 284. A typical implementation of this method is to use
VSYNC to interrupt a microprocessor, which in turn loads the
new data (2 bytes) in every field. If no new data is required for
transmission, 0s must be inserted in both data registers; this is
called nulling. It is also important to load control codes, all of
which are double bytes, on Line 21. Otherwise, a TV does not
recognize them. If there is a message such as “Hello World”
that has an odd number of characters, it is important to add a
blank character at the end to make sure that the end-of-caption,
2-byte control code lands in the same field.
R
S
T
A
T
D0 TO D6
ASCII CHARACTERS
TWO 7-BIT + PARITY
BYTE 0
33.764µs
(DATA)
A
R
P
T
Y
I
D0 TO D6
BYTE 1
R
P
A
T
Y
I
ADV7342/ADV7343